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Date:   Tue, 16 Nov 2021 12:11:21 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To:     Richard Weinberger <richard@....at>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Vignesh Raghavendra <vigneshr@...com>,
        Sergei Shtylyov <sergei.shtylyov@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Wolfram Sang <wsa+renesas@...g-engineering.com>,
        Rob Herring <robh+dt@...nel.org>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-spi@...r.kernel.org, linux-mtd@...ts.infradead.org,
        Biju Das <biju.das.jz@...renesas.com>,
        Prabhakar <prabhakar.csengg@...il.com>,
        devicetree@...r.kernel.org
Subject: Re: (subset) [PATCH v2 7/7] memory: renesas-rpc-if: Add support for RZ/G2L

On Mon, 25 Oct 2021 21:56:31 +0100, Lad Prabhakar wrote:
> SPI Multi I/O Bus Controller on RZ/G2L SoC is almost identical to
> the RPC-IF interface found on R-Car Gen3 SoC's.
> 
> This patch adds a new compatible string for the RZ/G2L family so
> that the timing values on RZ/G2L can be adjusted.
> 
> 
> [...]

Applied, thanks!

[7/7] memory: renesas-rpc-if: Add support for RZ/G2L
      commit: b04cc0d912eb80d3c438b11d96ca847c3e77e8ab

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>

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