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Message-ID: <CAPLW+4=QoTLzZsHHxM_E+WhzhYKsfEisFe_berH=i9G=TSb0ng@mail.gmail.com>
Date:   Mon, 15 Nov 2021 20:56:10 +0200
From:   Sam Protsenko <semen.protsenko@...aro.org>
To:     Jaewon Kim <jaewon02.kim@...sung.com>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        Wolfram Sang <wsa@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-samsung-soc@...r.kernel.org, linux-i2c@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        chanho61.park@...sung.com, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 1/2] dt-bindings: i2c: exynos5: add exynosautov9-hsi2c compatible

On Fri, 12 Nov 2021 at 03:06, Jaewon Kim <jaewon02.kim@...sung.com> wrote:
>
> This patch adds new "samsung,exynosautov9-hsi2c" compatible.
> It is for i2c compatible with HSI2C available on Exynos SoC with USI.
>
> Signed-off-by: Jaewon Kim <jaewon02.kim@...sung.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
> ---

Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>

>  Documentation/devicetree/bindings/i2c/i2c-exynos5.txt | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> index 2dbc0b62daa6..39f4067d9d1f 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> @@ -14,6 +14,8 @@ Required properties:
>                                 on Exynos5260 SoCs.
>         -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
>                                 on Exynos7 SoCs.
> +       -> "samsung,exynosautov9-hsi2c", for i2c compatible with HSI2C available
> +                               on ExynosAutov9 SoCs.
>
>    - reg: physical base address of the controller and length of memory mapped
>      region.
> @@ -31,6 +33,11 @@ Optional properties:
>         at 100khz.
>      -> If specified, the bus operates in high-speed mode only if the
>         clock-frequency is >= 1Mhz.
> +  - samsung,sysreg : system registers controller phandle to control USI.
> +    -> If I2C integrated to USI(Universal Serial Interface), this property
> +       is required. When using Exynos USI block, it needs to select which type
> +       of Serial IPs(UART, SPI, I2C) to use with system register. So, it
> +       requires samsung,sysreg phandle and offset value of system register.
>
>  Example:
>
> --
> 2.33.1
>

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