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Message-Id: <20211117011244.158541-1-deng.changcheng@zte.com.cn>
Date: Wed, 17 Nov 2021 01:12:44 +0000
From: cgel.zte@...il.com
To: avifishman70@...il.com
Cc: tmaimon77@...il.com, tali.perry1@...il.com, venture@...gle.com,
yuenn@...gle.com, benjaminfair@...gle.com, mturquette@...libre.com,
sboyd@...nel.org, openbmc@...ts.ozlabs.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
Changcheng Deng <deng.changcheng@....com.cn>,
Zeal Robot <zealci@....com.cn>
Subject: [PATCH] clk: Use div64_ul instead of do_div
From: Changcheng Deng <deng.changcheng@....com.cn>
do_div() does a 64-by-32 division. If the divisor is unsigned long, using
div64_ul can avoid truncation to 32-bit.
Reported-by: Zeal Robot <zealci@....com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng@....com.cn>
---
drivers/clk/clk-npcm7xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-npcm7xx.c b/drivers/clk/clk-npcm7xx.c
index e677bb5a784b..c75880af2b74 100644
--- a/drivers/clk/clk-npcm7xx.c
+++ b/drivers/clk/clk-npcm7xx.c
@@ -56,7 +56,7 @@ static unsigned long npcm7xx_clk_pll_recalc_rate(struct clk_hw *hw,
otdv2 = FIELD_GET(PLLCON_OTDV2, val);
ret = (u64)parent_rate * fbdv;
- do_div(ret, indv * otdv1 * otdv2);
+ div64_ul(ret, indv * otdv1 * otdv2);
return ret;
}
--
2.25.1
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