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Message-ID: <CAMuHMdXyBcJ8FB+AQ4QEVFXnCH32kJwNmRqs_FqYpmtWcVMxBA@mail.gmail.com>
Date: Wed, 17 Nov 2021 09:35:19 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
linux-clk <linux-clk@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH] clk: renesas: r9a07g044: Add RSPI clock and reset entries
On Wed, Nov 17, 2021 at 1:26 AM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> Add RSPI{0,1,2} clock and reset entries to CPG driver.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk-for-v5.17.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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