lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <BN0PR11MB572705BAE8AA3E8CB77CE9C3859A9@BN0PR11MB5727.namprd11.prod.outlook.com>
Date:   Wed, 17 Nov 2021 12:05:17 +0000
From:   "Srikandan, Nandhini" <nandhini.srikandan@...el.com>
To:     Serge Semin <fancer.lancer@...il.com>,
        Mark Brown <broonie@...nel.org>
CC:     Serge Semin <Sergey.Semin@...kalelectronics.ru>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "mgross@...ux.intel.com" <mgross@...ux.intel.com>,
        "Pan, Kris" <kris.pan@...el.com>,
        "Demakkanavar, Kenchappa" <kenchappa.demakkanavar@...el.com>,
        "Zhou, Furong" <furong.zhou@...el.com>,
        "Sangannavar, Mallikarjunappa" 
        <mallikarjunappa.sangannavar@...el.com>,
        "Vaidya, Mahesh R" <mahesh.r.vaidya@...el.com>,
        "A, Rashmi" <rashmi.a@...el.com>
Subject: RE: [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SSI
 controller


> -----Original Message-----
> From: Serge Semin <fancer.lancer@...il.com>
> Sent: Thursday, November 11, 2021 8:37 PM
> To: Mark Brown <broonie@...nel.org>; Srikandan, Nandhini
> <nandhini.srikandan@...el.com>
> Cc: Serge Semin <Sergey.Semin@...kalelectronics.ru>; robh+dt@...nel.org;
> linux-spi@...r.kernel.org; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org; mgross@...ux.intel.com; Pan, Kris
> <kris.pan@...el.com>; Demakkanavar, Kenchappa
> <kenchappa.demakkanavar@...el.com>; Zhou, Furong
> <furong.zhou@...el.com>; Sangannavar, Mallikarjunappa
> <mallikarjunappa.sangannavar@...el.com>; Vaidya, Mahesh R
> <mahesh.r.vaidya@...el.com>; A, Rashmi <rashmi.a@...el.com>
> Subject: Re: [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SSI
> controller
> 
> On Thu, Nov 11, 2021 at 03:01:12PM +0000, Mark Brown wrote:
> > On Thu, Nov 11, 2021 at 05:31:08PM +0300, Serge Semin wrote:
> >
> > > BTW Mark, why not to have a generic DT-property which would set that
> > > flag automatically by the SPI-core subsystem seeing it's indeed a
> > > client device-property? For instance there can be some property like
> > > "spi-cs-toggle" DT-property which when specified for the particular
> > > SPI-client DT-node will make the SPI-core subsystem to set the
> >
> > Anything like this is fundamentally part of the wire protocol for the
> > device, there's no need for an extra property on top of the compatible
> > for the device and the driver really, really needs to know what's
> > going on to avoid data corruption.  You could also use this feature
> > together with varying the word size as an optimisation at runtime (eg,
> > do long sequences of register writes in a single hardware operation by
> > setting an appropriate word length to cause the controller to bounce
> > chip select between writes).
> >
> > > SPI_CS_WORD flag of the device mode? Like it has already been done
> > > for "spi-cs-high"/"spi-lsb-first"/etc.
> >
> > I don't think either of those properties was a good idea, there's a
> > bunch of stuff in the older SPI bindings that don't make much sense.
> 
> Ok. Thanks for clarification. No new DT-property then.
> 
> Nandhini, could you please drop this patch in v4? One more time I'm sorry
> for misleading you on v2.

Sure, I will make use of SPI_CS_WORD flag and drop this patch in next version. 

> 
> -Sergey

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ