linux-kernel - [PATCH] clk: tegra: Use div64_ul instead of do

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Message-Id: <20211117014714.159005-1-deng.changcheng@zte.com.cn>
Date:   Wed, 17 Nov 2021 01:47:14 +0000
From:   cgel.zte@...il.com
To:     pdeschrijver@...dia.com
Cc:     pgaikwad@...dia.com, mturquette@...libre.com, sboyd@...nel.org,
        thierry.reding@...il.com, jonathanh@...dia.com,
        linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Changcheng Deng <deng.changcheng@....com.cn>,
        Zeal Robot <zealci@....com.cn>
Subject: [PATCH] clk: tegra: Use div64_ul instead of do_div

From: Changcheng Deng <deng.changcheng@....com.cn>

do_div() does a 64-by-32 division. If the divisor is unsigned long, using
div64_ul can avoid truncation to 32-bit.

Reported-by: Zeal Robot <zealci@....com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng@....com.cn>
---
 drivers/clk/tegra/clk-utils.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/tegra/clk-utils.c b/drivers/clk/tegra/clk-utils.c
index 1a5daae4e501..12658add9dd7 100644
--- a/drivers/clk/tegra/clk-utils.c
+++ b/drivers/clk/tegra/clk-utils.c
@@ -26,7 +26,7 @@ int div_frac_get(unsigned long rate, unsigned parent_rate, u8 width,
 	if (flags & TEGRA_DIVIDER_ROUND_UP)
 		divider_ux1 += rate - 1;
 
-	do_div(divider_ux1, rate);
+	div64_ul(divider_ux1, rate);
 
 	if (flags & TEGRA_DIVIDER_INT)
 		divider_ux1 *= mul;
-- 
2.25.1