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Message-Id: <20211117124653.161699-1-deng.changcheng@zte.com.cn>
Date:   Wed, 17 Nov 2021 12:46:53 +0000
From:   cgel.zte@...il.com
To:     u.kleine-koenig@...gutronix.de
Cc:     alexandre.belloni@...tlin.com, cgel.zte@...il.com,
        deng.changcheng@....com.cn, lee.jones@...aro.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pwm@...r.kernel.org, ludovic.desroches@...rochip.com,
        nicolas.ferre@...rochip.com, thierry.reding@...il.com,
        zealci@....com.cn
Subject: [PATCH V2] pwm: Use div64_ul instead of do_div

From: Changcheng Deng <deng.changcheng@....com.cn>

do_div() does a 64-by-32 division. If the divisor is unsigned long, using
div64_ul can avoid truncation to 32-bit.

Reported-by: Zeal Robot <zealci@....com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng@....com.cn>
---
 drivers/pwm/pwm-atmel-hlcdc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pwm/pwm-atmel-hlcdc.c b/drivers/pwm/pwm-atmel-hlcdc.c
index a43b2babc809..1ae3d73b9832 100644
--- a/drivers/pwm/pwm-atmel-hlcdc.c
+++ b/drivers/pwm/pwm-atmel-hlcdc.c
@@ -60,7 +60,7 @@ static int atmel_hlcdc_pwm_apply(struct pwm_chip *c, struct pwm_device *pwm,
 				return -EINVAL;
 
 			clk_period_ns = (u64)NSEC_PER_SEC * 256;
-			do_div(clk_period_ns, clk_freq);
+			clk_period_ns = div64_ul(clk_period_ns, clk_freq);
 		}
 
 		/* Errata: cannot use slow clk on some IP revisions */
@@ -72,7 +72,7 @@ static int atmel_hlcdc_pwm_apply(struct pwm_chip *c, struct pwm_device *pwm,
 				return -EINVAL;
 
 			clk_period_ns = (u64)NSEC_PER_SEC * 256;
-			do_div(clk_period_ns, clk_freq);
+			clk_period_ns = div64_ul(clk_period_ns, clk_freq);
 		}
 
 		for (pres = 0; pres <= ATMEL_HLCDC_PWMPS_MAX; pres++) {
-- 
2.25.1

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