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Message-ID: <YZT8c42cAczfKyMP@sirena.org.uk>
Date:   Wed, 17 Nov 2021 12:58:27 +0000
From:   Mark Brown <broonie@...nel.org>
To:     Daniel Baluta <daniel.baluta@....nxp.com>
Cc:     alsa-devel@...a-project.org, pierre-louis.bossart@...ux.intel.com,
        lgirdwood@...il.com, ranjani.sridharan@...ux.intel.com,
        kai.vehmanen@...ux.intel.com, daniel.baluta@...il.com,
        linux-imx@....com, peter.ujfalusi@...ux.intel.com,
        guennadi.liakhovetski@...ux.intel.com,
        linux-kernel@...r.kernel.org,
        Daniel Baluta <daniel.baluta@....com>,
        Paul Olaru <paul.olaru@....nxp.com>
Subject: Re: [PATCH 1/5] ASoC: SOF: imx: Add code to manage DSP related clocks

On Tue, Nov 16, 2021 at 05:46:09PM +0200, Daniel Baluta wrote:
> From: Daniel Baluta <daniel.baluta@....com>
> 
> We need at least 3 clocks in order to power up and access
> DSP core registers found on i.MX8QM, i.MX8QXP and i.MX8MP
> platforms.

This doesn't apply against current code, please check and resend.

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