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Message-ID: <YZYv5aPqDyFIQibj@piout.net>
Date: Thu, 18 Nov 2021 11:50:13 +0100
From: Alexandre Belloni <alexandre.belloni@...tlin.com>
To: Kavyasree.Kotagiri@...rochip.com
Cc: robh+dt@...nel.org, linus.walleij@...aro.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH 2/2] pinctrl: ocelot: Extend support for lan966x
On 18/11/2021 09:24:56+0000, Kavyasree.Kotagiri@...rochip.com wrote:
> > > + * but it doesn't matter much for now.
> > > + * Note: ALT0/ALT1/ALT2 are organized specially for 78 gpio targets
> > > + */
> > > + regmap_update_bits(info->map, REG_ALT(0, info, pin->pin),
> > > + BIT(p), f << p);
> > > + regmap_update_bits(info->map, REG_ALT(1, info, pin->pin),
> > > + BIT(p), (f >> 1) << p);
> > > + regmap_update_bits(info->map, REG_ALT(2, info, pin->pin),
> > > + BIT(p), (f >> 2) << p);
> > > +
> >
> > I would have thought the hardware would be fixed because you now have 78
> > pins and this probably will get worse over time. This is really a poor
> > choice of interface as now you will get two transient states instead of
> > one.
> >
> Sorry, I couldn't get you. please elaborate what you meant by this comment?
>
Not mush you can do on your side, this was just a rant. I raised the
issue to Allan, hoping that this will get fixed in the next SoCs ;)
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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