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Message-ID: <202111182032.E3f9s0BI-lkp@intel.com>
Date: Thu, 18 Nov 2021 20:53:39 +0800
From: kernel test robot <lkp@...el.com>
To: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Mark Brown <broonie@...nel.org>
Subject: drivers/spi/spi-altera-dfl.c:52:30: sparse: sparse: incorrect type
in initializer (different address spaces)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 42eb8fdac2fc5d62392dcfcf0253753e821a97b0
commit: ba2fc167e9447596a812e828842d0130ea9cd0e4 spi: altera: Add DFL bus driver for Altera API Controller
date: 7 months ago
config: m68k-randconfig-s031-20211109 (attached as .config)
compiler: m68k-linux-gcc (GCC) 11.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-dirty
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ba2fc167e9447596a812e828842d0130ea9cd0e4
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout ba2fc167e9447596a812e828842d0130ea9cd0e4
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=m68k
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/spi/spi-altera-dfl.c:52:30: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected void [noderef] __iomem *base @@ got void *context @@
drivers/spi/spi-altera-dfl.c:52:30: sparse: expected void [noderef] __iomem *base
drivers/spi/spi-altera-dfl.c:52:30: sparse: got void *context
drivers/spi/spi-altera-dfl.c:78:30: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected void [noderef] __iomem *base @@ got void *context @@
drivers/spi/spi-altera-dfl.c:78:30: sparse: expected void [noderef] __iomem *base
drivers/spi/spi-altera-dfl.c:78:30: sparse: got void *context
>> drivers/spi/spi-altera-dfl.c:161:22: sparse: sparse: incorrect type in argument 3 (different address spaces) @@ expected void *bus_context @@ got void [noderef] __iomem *[assigned] base @@
drivers/spi/spi-altera-dfl.c:161:22: sparse: expected void *bus_context
drivers/spi/spi-altera-dfl.c:161:22: sparse: got void [noderef] __iomem *[assigned] base
vim +52 drivers/spi/spi-altera-dfl.c
48
49 static int indirect_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val)
51 {
> 52 void __iomem *base = context;
53 int loops;
54 u64 v;
55
56 writeq((reg >> 2) | INDIRECT_RD, base + INDIRECT_ADDR);
57
58 loops = 0;
59 while ((readq(base + INDIRECT_ADDR) & INDIRECT_RD) &&
60 (loops++ < INDIRECT_TIMEOUT))
61 cpu_relax();
62
63 if (loops >= INDIRECT_TIMEOUT) {
64 pr_err("%s timed out %d\n", __func__, loops);
65 return -ETIME;
66 }
67
68 v = readq(base + INDIRECT_RD_DATA);
69
70 *val = v & INDIRECT_DATA_MASK;
71
72 return 0;
73 }
74
75 static int indirect_bus_reg_write(void *context, unsigned int reg,
76 unsigned int val)
77 {
78 void __iomem *base = context;
79 int loops;
80
81 writeq(val, base + INDIRECT_WR_DATA);
82 writeq((reg >> 2) | INDIRECT_WR, base + INDIRECT_ADDR);
83
84 loops = 0;
85 while ((readq(base + INDIRECT_ADDR) & INDIRECT_WR) &&
86 (loops++ < INDIRECT_TIMEOUT))
87 cpu_relax();
88
89 if (loops >= INDIRECT_TIMEOUT) {
90 pr_err("%s timed out %d\n", __func__, loops);
91 return -ETIME;
92 }
93 return 0;
94 }
95
96 static const struct regmap_config indirect_regbus_cfg = {
97 .reg_bits = 32,
98 .reg_stride = 4,
99 .val_bits = 32,
100 .fast_io = true,
101 .max_register = 24,
102
103 .reg_write = indirect_bus_reg_write,
104 .reg_read = indirect_bus_reg_read,
105 };
106
107 static struct spi_board_info m10_bmc_info = {
108 .modalias = "m10-d5005",
109 .max_speed_hz = 12500000,
110 .bus_num = 0,
111 .chip_select = 0,
112 };
113
114 static void config_spi_master(void __iomem *base, struct spi_master *master)
115 {
116 u64 v;
117
118 v = readq(base + SPI_CORE_PARAMETER);
119
120 master->mode_bits = SPI_CS_HIGH;
121 if (FIELD_GET(CLK_POLARITY, v))
122 master->mode_bits |= SPI_CPOL;
123 if (FIELD_GET(CLK_PHASE, v))
124 master->mode_bits |= SPI_CPHA;
125
126 master->num_chipselect = FIELD_GET(NUM_CHIPSELECT, v);
127 master->bits_per_word_mask =
128 SPI_BPW_RANGE_MASK(1, FIELD_GET(DATA_WIDTH, v));
129 }
130
131 static int dfl_spi_altera_probe(struct dfl_device *dfl_dev)
132 {
133 struct device *dev = &dfl_dev->dev;
134 struct spi_master *master;
135 struct altera_spi *hw;
136 void __iomem *base;
137 int err = -ENODEV;
138
139 master = spi_alloc_master(dev, sizeof(struct altera_spi));
140 if (!master)
141 return -ENOMEM;
142
143 master->bus_num = dfl_dev->id;
144
145 hw = spi_master_get_devdata(master);
146
147 hw->dev = dev;
148
149 base = devm_ioremap_resource(dev, &dfl_dev->mmio_res);
150
151 if (IS_ERR(base)) {
152 dev_err(dev, "%s get mem resource fail!\n", __func__);
153 return PTR_ERR(base);
154 }
155
156 config_spi_master(base, master);
157 dev_dbg(dev, "%s cs %u bpm 0x%x mode 0x%x\n", __func__,
158 master->num_chipselect, master->bits_per_word_mask,
159 master->mode_bits);
160
> 161 hw->regmap = devm_regmap_init(dev, NULL, base, &indirect_regbus_cfg);
162 if (IS_ERR(hw->regmap))
163 return PTR_ERR(hw->regmap);
164
165 hw->irq = -EINVAL;
166
167 altera_spi_init_master(master);
168
169 err = devm_spi_register_master(dev, master);
170 if (err) {
171 dev_err(dev, "%s failed to register spi master %d\n", __func__, err);
172 goto exit;
173 }
174
175 if (!spi_new_device(master, &m10_bmc_info)) {
176 dev_err(dev, "%s failed to create SPI device: %s\n",
177 __func__, m10_bmc_info.modalias);
178 }
179
180 return 0;
181 exit:
182 spi_master_put(master);
183 return err;
184 }
185
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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