[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <e2c646a1-7e02-5dc5-0f02-1b4247772a69@linux.alibaba.com>
Date: Thu, 18 Nov 2021 22:17:54 +0800
From: Lai Jiangshan <laijs@...ux.alibaba.com>
To: Paolo Bonzini <pbonzini@...hat.com>,
Lai Jiangshan <jiangshanlai@...il.com>,
linux-kernel@...r.kernel.org
Cc: kvm@...r.kernel.org, Sean Christopherson <seanjc@...gle.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH 02/15] KVM: VMX: Avoid to rdmsrl(MSR_IA32_SYSENTER_ESP)
On 2021/11/18 19:18, Paolo Bonzini wrote:
> On 11/18/21 12:08, Lai Jiangshan wrote:
>> From: Lai Jiangshan <laijs@...ux.alibaba.com>
>>
>> The value of host MSR_IA32_SYSENTER_ESP is known to be constant for
>> each CPU: (cpu_entry_stack(cpu) + 1) when 32 bit syscall is enabled or
>> NULL is 32 bit syscall is not enabled.
>>
>> So rdmsrl() can be avoided for the first case and both rdmsrl() and
>> vmcs_writel() can be avoided for the second case.
>>
>> Signed-off-by: Lai Jiangshan <laijs@...ux.alibaba.com>
>
> Then it's not constant host state, isn't? The hunk in vmx_set_constant_host_state seems wrong.
>
The change in vmx_vcpu_load_vmcs() handles only the percpu constant case:
(cpu_entry_stack(cpu) + 1), it doesn't handle the case where
MSR_IA32_SYSENTER_ESP is NULL.
The change in vmx_set_constant_host_state() handles the case where
MSR_IA32_SYSENTER_ESP is NULL, it does be constant host state in this case.
If it is not the case, the added code in vmx_vcpu_load_vmcs() will override
it safely.
If an else branch with "vmcs_writel(HOST_IA32_SYSENTER_ESP, 0);" is added to
vmx_vcpu_load_vmcs(), we will not need to change vmx_set_constant_host_state().
- rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
- vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
+ if (IS_ENABLED(CONFIG_IA32_EMULATION) || IS_ENABLED(CONFIG_X86_32)) {
+ /* 22.2.3 */
+ vmcs_writel(HOST_IA32_SYSENTER_ESP,
+ (unsigned long)(cpu_entry_stack(cpu) + 1));
+ } else {
+ vmcs_writel(HOST_IA32_SYSENTER_ESP, 0);
+ }
I'm paranoid about the case when vmcs.HOST_IA32_SYSENTER_ESP is not reset to be
NULL when the vcpu is reset. So the hunk in vmx_set_constant_host_state() or
the else branch in vmx_vcpu_load_vmcs() is required. I just chose to change
the vmx_set_constant_host_state() so that we can reduce a vmcs_writel() in the
case where CONFIG_IA32_EMULATION is off in x86_64.
> Paolo
>
>> ---
>> arch/x86/kvm/vmx/vmx.c | 10 +++++++---
>> 1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
>> index 48a34d1a2989..4e4a33226edb 100644
>> --- a/arch/x86/kvm/vmx/vmx.c
>> +++ b/arch/x86/kvm/vmx/vmx.c
>> @@ -1271,7 +1271,6 @@ void vmx_vcpu_load_vmcs(struct kvm_vcpu *vcpu, int cpu,
>> if (!already_loaded) {
>> void *gdt = get_current_gdt_ro();
>> - unsigned long sysenter_esp;
>> /*
>> * Flush all EPTP/VPID contexts, the new pCPU may have stale
>> @@ -1287,8 +1286,11 @@ void vmx_vcpu_load_vmcs(struct kvm_vcpu *vcpu, int cpu,
>> (unsigned long)&get_cpu_entry_area(cpu)->tss.x86_tss);
>> vmcs_writel(HOST_GDTR_BASE, (unsigned long)gdt); /* 22.2.4 */
>> - rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
>> - vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
>> + if (IS_ENABLED(CONFIG_IA32_EMULATION) || IS_ENABLED(CONFIG_X86_32)) {
>> + /* 22.2.3 */
>> + vmcs_writel(HOST_IA32_SYSENTER_ESP,
>> + (unsigned long)(cpu_entry_stack(cpu) + 1));
>> + }
>> vmx->loaded_vmcs->cpu = cpu;
>> }
>> @@ -4021,6 +4023,8 @@ void vmx_set_constant_host_state(struct vcpu_vmx *vmx)
>> rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);
>> vmcs_write32(HOST_IA32_SYSENTER_CS, low32);
>> + rdmsrl(MSR_IA32_SYSENTER_ESP, tmpl);
>> + vmcs_writel(HOST_IA32_SYSENTER_ESP, tmpl);
>> rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl);
>> vmcs_writel(HOST_IA32_SYSENTER_EIP, tmpl); /* 22.2.3 */
>
Powered by blists - more mailing lists