linux-kernel - Re: [PATCH] s390/test_unwind: use raw opcode instead of invalid instruction

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Message-ID: <4ee51adb-090f-071f-6f0e-ab739fe98498@de.ibm.com>
Date:   Fri, 19 Nov 2021 10:44:44 +0100
From:   Christian Borntraeger <borntraeger@...ibm.com>
To:     Nick Desaulniers <ndesaulniers@...gle.com>,
        Ilie Halip <ilie.halip@...il.com>
Cc:     linux-kernel@...r.kernel.org, Heiko Carstens <hca@...ux.ibm.com>,
        Vasily Gorbik <gor@...ux.ibm.com>,
        Alexander Gordeev <agordeev@...ux.ibm.com>,
        Nathan Chancellor <nathan@...nel.org>,
        Mete Durlu <meted@...ux.ibm.com>,
        Sven Schnelle <svens@...ux.ibm.com>,
        linux-s390@...r.kernel.org, llvm@...ts.linux.dev,
        Ulrich Weigand <Ulrich.Weigand@...ibm.com>
Subject: Re: [PATCH] s390/test_unwind: use raw opcode instead of invalid
 instruction



Am 19.11.21 um 10:39 schrieb Christian Borntraeger:
> 
> 
> Am 19.11.21 um 02:10 schrieb Nick Desaulniers:
>> On Wed, Nov 17, 2021 at 9:48 AM Ilie Halip <ilie.halip@...il.com> wrote:
>>>
>>> Building with clang & LLVM_IAS=1 leads to an error:
>>>      arch/s390/lib/test_unwind.c:179:4: error: invalid register pair
>>>                          "       mvcl    %%r1,%%r1\n"
>>>                          ^
>>>
>>> The test creates an invalid instruction that would trap at runtime, but the
>>> LLVM inline assembler tries to validate it at compile time too.
>>>
>>> Use the raw instruction opcode instead.
>>>
>>> Link: https://github.com/ClangBuiltLinux/linux/issues/1421
>>> Reported-by: Nick Desaulniers <ndesaulniers@...gle.com>
>>> Signed-off-by: Ilie Halip <ilie.halip@...il.com>
>>
>> Ilie, thanks for the patch!
>>
>> So if I understand
>> https://sourceware.org/binutils/docs/as/s390-Directives.html#s390-Directives
>> https://sourceware.org/binutils/docs/as/s390-Formats.html
>> that `e,` prefix is for 16B opcodes?
> 
> e is an instruction format as specified by the architecture.
> See http://publibfp.dhe.ibm.com/epubs/pdf/a227832c.pdf

(page 5-3 for the instruction formats and page 7-289 for MVCL)