linux-kernel - Re: [PATCHv4 1/2] tracing: Add register read/write tracing support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 19 Nov 2021 14:17:31 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     Sai Prakash Ranjan <quic_saipraka@...cinc.com>
Cc:     Will Deacon <will@...nel.org>, <rostedt@...dmis.org>,
        Catalin Marinas <catalin.marinas@....com>,
        <quic_psodagud@...cinc.com>, <gregkh@...uxfoundation.org>,
        <arnd@...db.de>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
        <mingo@...hat.com>, Prasad Sodagudi <psodagud@...eaurora.org>
Subject: Re: [PATCHv4 1/2] tracing: Add register read/write tracing support

On Fri, 19 Nov 2021 14:07:09 +0000,
Sai Prakash Ranjan <quic_saipraka@...cinc.com> wrote:
> 
> On 11/19/2021 7:13 PM, Marc Zyngier wrote:
> > On Mon, 15 Nov 2021 11:33:29 +0000,
> > Sai Prakash Ranjan <quic_saipraka@...cinc.com> wrote:
> >> From: Prasad Sodagudi <psodagud@...eaurora.org>
> >> 

[...]

> >> Reason why we wouldn't need value along with mmio write log is
> >> that value can be easily deduced from the caller_name+offset which is
> >> printed already by the rwmmio trace events which gives the exact
> >> location of mmio writes and the value is easily known from the driver.
> > That's a very narrow view of what can be written in an MMIO
> > registers. We write dynamic values at all times, and if we are able to
> > trace MMIO writes, then the value written out must be part of the trace.
> > 
> > I'd rather you try and get to the bottom of this issue rather than
> > paper over it.
> > 
> > Thanks,
> > 
> > 	M.
> > 
> 
> Sure, idea was to put it out in the open if anyone has any idea as
> to what might be happening there since the version where directly
> instrumenting the raw read/write accessors in arm64/asm/io.h was
> working fine casting doubts if this has to do something with
> inlining as Arnd mentioned before.

Yup. I wouldn't be surprised if MMIO accessors were getting directly
inlined at the wrong location and creating havoc. For example:

	writel(readl(addr1) | 1, addr2);

If you're not careful about capturing the result of the read rather
than the read itself, you can end-up with something really funky. No
idea if that's what is happening, but a disassembly of the generated
code could tell you.

	M.

-- 
Without deviation from the norm, progress is not possible.