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Message-ID: <202111201009.Pmo2bUt3-lkp@intel.com>
Date: Sat, 20 Nov 2021 10:21:35 +0800
From: kernel test robot <lkp@...el.com>
To: Will McVicker <willmcvicker@...gle.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Krzysztof Kozlowski <krzk@...nel.org>
Subject: [snawrocki-clk:for-v5.17/next 4/4]
drivers/clk/samsung/clk-exynos4.c:1265:37: error: 'hws' undeclared
tree: https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git for-v5.17/next
head: 4a7ec3a42270a1908c711e08a09117957ee75886
commit: 4a7ec3a42270a1908c711e08a09117957ee75886 [4/4] clk: samsung: update CPU clk registration
config: arc-randconfig-r043-20211119 (attached as .config)
compiler: arceb-elf-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git/commit/?id=4a7ec3a42270a1908c711e08a09117957ee75886
git remote add snawrocki-clk https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git
git fetch --no-tags snawrocki-clk for-v5.17/next
git checkout 4a7ec3a42270a1908c711e08a09117957ee75886
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arc SHELL=/bin/bash drivers/clk/samsung/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
drivers/clk/samsung/clk-exynos4.c: In function 'exynos4_clk_init':
>> drivers/clk/samsung/clk-exynos4.c:1265:37: error: 'hws' undeclared (first use in this function)
1265 | if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24000000) {
| ^~~
drivers/clk/samsung/clk-exynos4.c:1265:37: note: each undeclared identifier is reported only once for each function it appears in
--
drivers/clk/samsung/clk-exynos5250.c: In function 'exynos5250_clk_init':
>> drivers/clk/samsung/clk-exynos5250.c:807:29: error: 'hws' undeclared (first use in this function)
807 | if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24 * MHZ) {
| ^~~
drivers/clk/samsung/clk-exynos5250.c:807:29: note: each undeclared identifier is reported only once for each function it appears in
vim +/hws +1265 drivers/clk/samsung/clk-exynos4.c
4a7ec3a42270a1 Will McVicker 2021-10-15 1240
e062b571777f52 Thomas Abraham 2013-03-09 1241 /* register exynos4 clocks */
d75f306378fd32 Sachin Kamat 2013-07-18 1242 static void __init exynos4_clk_init(struct device_node *np,
b7b647be157c95 Tomasz Figa 2014-02-14 1243 enum exynos4_soc soc)
e062b571777f52 Thomas Abraham 2013-03-09 1244 {
976face4b46ab3 Rahul Sharma 2014-03-12 1245 struct samsung_clk_provider *ctx;
ff8e0ff9b99643 Sylwester Nawrocki 2020-08-26 1246
b7b647be157c95 Tomasz Figa 2014-02-14 1247 exynos4_soc = soc;
442f4948e5b0b2 Tomasz Figa 2014-02-14 1248
e062b571777f52 Thomas Abraham 2013-03-09 1249 reg_base = of_iomap(np, 0);
e062b571777f52 Thomas Abraham 2013-03-09 1250 if (!reg_base)
e062b571777f52 Thomas Abraham 2013-03-09 1251 panic("%s: failed to map registers\n", __func__);
e062b571777f52 Thomas Abraham 2013-03-09 1252
976face4b46ab3 Rahul Sharma 2014-03-12 1253 ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS);
e062b571777f52 Thomas Abraham 2013-03-09 1254
976face4b46ab3 Rahul Sharma 2014-03-12 1255 samsung_clk_of_register_fixed_ext(ctx, exynos4_fixed_rate_ext_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1256 ARRAY_SIZE(exynos4_fixed_rate_ext_clks),
e062b571777f52 Thomas Abraham 2013-03-09 1257 ext_clk_match);
e062b571777f52 Thomas Abraham 2013-03-09 1258
976face4b46ab3 Rahul Sharma 2014-03-12 1259 exynos4_clk_register_finpll(ctx);
e062b571777f52 Thomas Abraham 2013-03-09 1260
e062b571777f52 Thomas Abraham 2013-03-09 1261 if (exynos4_soc == EXYNOS4210) {
976face4b46ab3 Rahul Sharma 2014-03-12 1262 samsung_clk_register_mux(ctx, exynos4210_mux_early,
4f7641f588dcc5 Tomasz Figa 2013-08-26 1263 ARRAY_SIZE(exynos4210_mux_early));
4f7641f588dcc5 Tomasz Figa 2013-08-26 1264
015e70585b317b Marek Szyprowski 2021-10-18 @1265 if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24000000) {
5fadfc7ed37efe Tomasz Figa 2013-08-26 1266 exynos4210_plls[apll].rate_table =
5fadfc7ed37efe Tomasz Figa 2013-08-26 1267 exynos4210_apll_rates;
5fadfc7ed37efe Tomasz Figa 2013-08-26 1268 exynos4210_plls[epll].rate_table =
5fadfc7ed37efe Tomasz Figa 2013-08-26 1269 exynos4210_epll_rates;
5fadfc7ed37efe Tomasz Figa 2013-08-26 1270 }
5fadfc7ed37efe Tomasz Figa 2013-08-26 1271
015e70585b317b Marek Szyprowski 2021-10-18 1272 if (clk_hw_get_rate(hws[CLK_MOUT_VPLLSRC]) == 24000000)
5fadfc7ed37efe Tomasz Figa 2013-08-26 1273 exynos4210_plls[vpll].rate_table =
5fadfc7ed37efe Tomasz Figa 2013-08-26 1274 exynos4210_vpll_rates;
5fadfc7ed37efe Tomasz Figa 2013-08-26 1275
976face4b46ab3 Rahul Sharma 2014-03-12 1276 samsung_clk_register_pll(ctx, exynos4210_plls,
52b0601637ac41 Tomasz Figa 2013-08-26 1277 ARRAY_SIZE(exynos4210_plls), reg_base);
e062b571777f52 Thomas Abraham 2013-03-09 1278 } else {
015e70585b317b Marek Szyprowski 2021-10-18 1279 if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24000000) {
efb19a85cb0b44 Tomasz Figa 2013-08-26 1280 exynos4x12_plls[apll].rate_table =
efb19a85cb0b44 Tomasz Figa 2013-08-26 1281 exynos4x12_apll_rates;
efb19a85cb0b44 Tomasz Figa 2013-08-26 1282 exynos4x12_plls[epll].rate_table =
efb19a85cb0b44 Tomasz Figa 2013-08-26 1283 exynos4x12_epll_rates;
efb19a85cb0b44 Tomasz Figa 2013-08-26 1284 exynos4x12_plls[vpll].rate_table =
efb19a85cb0b44 Tomasz Figa 2013-08-26 1285 exynos4x12_vpll_rates;
e062b571777f52 Thomas Abraham 2013-03-09 1286 }
e062b571777f52 Thomas Abraham 2013-03-09 1287
976face4b46ab3 Rahul Sharma 2014-03-12 1288 samsung_clk_register_pll(ctx, exynos4x12_plls,
c6415963006392 Tomasz Figa 2013-08-26 1289 ARRAY_SIZE(exynos4x12_plls), reg_base);
160641e71899d5 Yadwinder Singh Brar 2013-06-11 1290 }
e062b571777f52 Thomas Abraham 2013-03-09 1291
976face4b46ab3 Rahul Sharma 2014-03-12 1292 samsung_clk_register_fixed_rate(ctx, exynos4_fixed_rate_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1293 ARRAY_SIZE(exynos4_fixed_rate_clks));
976face4b46ab3 Rahul Sharma 2014-03-12 1294 samsung_clk_register_mux(ctx, exynos4_mux_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1295 ARRAY_SIZE(exynos4_mux_clks));
976face4b46ab3 Rahul Sharma 2014-03-12 1296 samsung_clk_register_div(ctx, exynos4_div_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1297 ARRAY_SIZE(exynos4_div_clks));
976face4b46ab3 Rahul Sharma 2014-03-12 1298 samsung_clk_register_gate(ctx, exynos4_gate_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1299 ARRAY_SIZE(exynos4_gate_clks));
01f7ec260ab352 Tomasz Figa 2014-06-24 1300 samsung_clk_register_fixed_factor(ctx, exynos4_fixed_factor_clks,
01f7ec260ab352 Tomasz Figa 2014-06-24 1301 ARRAY_SIZE(exynos4_fixed_factor_clks));
e062b571777f52 Thomas Abraham 2013-03-09 1302
e062b571777f52 Thomas Abraham 2013-03-09 1303 if (exynos4_soc == EXYNOS4210) {
976face4b46ab3 Rahul Sharma 2014-03-12 1304 samsung_clk_register_fixed_rate(ctx, exynos4210_fixed_rate_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1305 ARRAY_SIZE(exynos4210_fixed_rate_clks));
976face4b46ab3 Rahul Sharma 2014-03-12 1306 samsung_clk_register_mux(ctx, exynos4210_mux_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1307 ARRAY_SIZE(exynos4210_mux_clks));
976face4b46ab3 Rahul Sharma 2014-03-12 1308 samsung_clk_register_div(ctx, exynos4210_div_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1309 ARRAY_SIZE(exynos4210_div_clks));
976face4b46ab3 Rahul Sharma 2014-03-12 1310 samsung_clk_register_gate(ctx, exynos4210_gate_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1311 ARRAY_SIZE(exynos4210_gate_clks));
01f7ec260ab352 Tomasz Figa 2014-06-24 1312 samsung_clk_register_fixed_factor(ctx,
01f7ec260ab352 Tomasz Figa 2014-06-24 1313 exynos4210_fixed_factor_clks,
01f7ec260ab352 Tomasz Figa 2014-06-24 1314 ARRAY_SIZE(exynos4210_fixed_factor_clks));
4a7ec3a42270a1 Will McVicker 2021-10-15 1315 samsung_clk_register_cpu(ctx, exynos4210_cpu_clks,
4a7ec3a42270a1 Will McVicker 2021-10-15 1316 ARRAY_SIZE(exynos4210_cpu_clks));
e062b571777f52 Thomas Abraham 2013-03-09 1317 } else {
976face4b46ab3 Rahul Sharma 2014-03-12 1318 samsung_clk_register_mux(ctx, exynos4x12_mux_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1319 ARRAY_SIZE(exynos4x12_mux_clks));
976face4b46ab3 Rahul Sharma 2014-03-12 1320 samsung_clk_register_div(ctx, exynos4x12_div_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1321 ARRAY_SIZE(exynos4x12_div_clks));
976face4b46ab3 Rahul Sharma 2014-03-12 1322 samsung_clk_register_gate(ctx, exynos4x12_gate_clks,
e062b571777f52 Thomas Abraham 2013-03-09 1323 ARRAY_SIZE(exynos4x12_gate_clks));
01f7ec260ab352 Tomasz Figa 2014-06-24 1324 samsung_clk_register_fixed_factor(ctx,
01f7ec260ab352 Tomasz Figa 2014-06-24 1325 exynos4x12_fixed_factor_clks,
01f7ec260ab352 Tomasz Figa 2014-06-24 1326 ARRAY_SIZE(exynos4x12_fixed_factor_clks));
4a7ec3a42270a1 Will McVicker 2021-10-15 1327 samsung_clk_register_cpu(ctx, exynos4412_cpu_clks,
4a7ec3a42270a1 Will McVicker 2021-10-15 1328 ARRAY_SIZE(exynos4412_cpu_clks));
cd6aceef028afc Bartlomiej Zolnierkiewicz 2015-08-12 1329 }
e6c3e730a75fae Tomasz Figa 2013-08-26 1330
3a9e9cb65be84d Bartlomiej Zolnierkiewicz 2015-03-27 1331 if (soc == EXYNOS4X12)
3a9e9cb65be84d Bartlomiej Zolnierkiewicz 2015-03-27 1332 exynos4x12_core_down_clock();
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1333
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1334 samsung_clk_extended_sleep_init(reg_base,
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1335 exynos4_clk_regs, ARRAY_SIZE(exynos4_clk_regs),
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1336 src_mask_suspend, ARRAY_SIZE(src_mask_suspend));
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1337 if (exynos4_soc == EXYNOS4210)
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1338 samsung_clk_extended_sleep_init(reg_base,
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1339 exynos4210_clk_save, ARRAY_SIZE(exynos4210_clk_save),
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1340 src_mask_suspend_e4210, ARRAY_SIZE(src_mask_suspend_e4210));
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1341 else
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1342 samsung_clk_sleep_init(reg_base, exynos4x12_clk_save,
9a4d8a8c4d2a46 Marek Szyprowski 2018-09-06 1343 ARRAY_SIZE(exynos4x12_clk_save));
b7b647be157c95 Tomasz Figa 2014-02-14 1344
d5e136a21b2028 Sylwester Nawrocki 2014-06-18 1345 samsung_clk_of_add_provider(np, ctx);
d5e136a21b2028 Sylwester Nawrocki 2014-06-18 1346
e062b571777f52 Thomas Abraham 2013-03-09 1347 pr_info("%s clocks: sclk_apll = %ld, sclk_mpll = %ld\n"
e062b571777f52 Thomas Abraham 2013-03-09 1348 "\tsclk_epll = %ld, sclk_vpll = %ld, arm_clk = %ld\n",
e062b571777f52 Thomas Abraham 2013-03-09 1349 exynos4_soc == EXYNOS4210 ? "Exynos4210" : "Exynos4x12",
015e70585b317b Marek Szyprowski 2021-10-18 1350 clk_hw_get_rate(hws[CLK_SCLK_APLL]),
015e70585b317b Marek Szyprowski 2021-10-18 1351 clk_hw_get_rate(hws[CLK_SCLK_MPLL]),
015e70585b317b Marek Szyprowski 2021-10-18 1352 clk_hw_get_rate(hws[CLK_SCLK_EPLL]),
015e70585b317b Marek Szyprowski 2021-10-18 1353 clk_hw_get_rate(hws[CLK_SCLK_VPLL]),
015e70585b317b Marek Szyprowski 2021-10-18 1354 clk_hw_get_rate(hws[CLK_DIV_CORE2]));
e062b571777f52 Thomas Abraham 2013-03-09 1355 }
25e56eba0ae783 Arnd Bergmann 2013-04-10 1356
:::::: The code at line 1265 was first introduced by commit
:::::: 015e70585b317bfd90fced9bfd578fe57f9aa2cf clk: samsung: remove __clk_lookup() usage
:::::: TO: Marek Szyprowski <m.szyprowski@...sung.com>
:::::: CC: Sylwester Nawrocki <s.nawrocki@...sung.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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