linux-kernel - Re: [PATCH v7 01/45] x86/compressed/64: detect/setup SEV/SME features earlier in boot

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Message-ID: <YZ1jaiavtDTHVVD+@dt>
Date:   Tue, 23 Nov 2021 15:55:54 -0600
From:   Venu Busireddy <venu.busireddy@...cle.com>
To:     Michael Roth <michael.roth@....com>
Cc:     Borislav Petkov <bp@...en8.de>,
        Brijesh Singh <brijesh.singh@....com>, x86@...nel.org,
        linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
        linux-efi@...r.kernel.org, platform-driver-x86@...r.kernel.org,
        linux-coco@...ts.linux.dev, linux-mm@...ck.org,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Joerg Roedel <jroedel@...e.de>,
        Tom Lendacky <thomas.lendacky@....com>,
        "H. Peter Anvin" <hpa@...or.com>, Ard Biesheuvel <ardb@...nel.org>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Jim Mattson <jmattson@...gle.com>,
        Andy Lutomirski <luto@...nel.org>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Sergio Lopez <slp@...hat.com>, Peter Gonda <pgonda@...gle.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
        David Rientjes <rientjes@...gle.com>,
        Dov Murik <dovmurik@...ux.ibm.com>,
        Tobin Feldman-Fitzthum <tobin@....com>,
        Vlastimil Babka <vbabka@...e.cz>,
        "Kirill A . Shutemov" <kirill@...temov.name>,
        Andi Kleen <ak@...ux.intel.com>,
        "Dr . David Alan Gilbert" <dgilbert@...hat.com>,
        tony.luck@...el.com, marcorr@...gle.com,
        sathyanarayanan.kuppuswamy@...ux.intel.com
Subject: Re: [PATCH v7 01/45] x86/compressed/64: detect/setup SEV/SME
 features earlier in boot

On 2021-11-12 14:30:01 -0600, Michael Roth wrote:
> On Fri, Nov 12, 2021 at 05:52:51PM +0100, Borislav Petkov wrote:
> > On Wed, Nov 10, 2021 at 04:06:47PM -0600, Brijesh Singh wrote:
> > > +void sev_enable(struct boot_params *bp)
> > > +{
> > > +	unsigned int eax, ebx, ecx, edx;
> > > +
> > > +	/* Check for the SME/SEV support leaf */
> > > +	eax = 0x80000000;
> > > +	ecx = 0;
> > > +	native_cpuid(&eax, &ebx, &ecx, &edx);
> > > +	if (eax < 0x8000001f)
> > > +		return;
> > > +
> > > +	/*
> > > +	 * Check for the SME/SEV feature:
> > > +	 *   CPUID Fn8000_001F[EAX]
> > > +	 *   - Bit 0 - Secure Memory Encryption support
> > > +	 *   - Bit 1 - Secure Encrypted Virtualization support
> > > +	 *   CPUID Fn8000_001F[EBX]
> > > +	 *   - Bits 5:0 - Pagetable bit position used to indicate encryption
> > > +	 */
> > > +	eax = 0x8000001f;
> > > +	ecx = 0;
> > > +	native_cpuid(&eax, &ebx, &ecx, &edx);
> > > +	/* Check whether SEV is supported */
> > > +	if (!(eax & BIT(1)))
> > > +		return;
> > > +
> > > +	/* Check the SEV MSR whether SEV or SME is enabled */
> > > +	sev_status   = rd_sev_status_msr();
> > > +
> > > +	if (!(sev_status & MSR_AMD64_SEV_ENABLED))
> > > +		error("SEV support indicated by CPUID, but not SEV status MSR.");
> > 
> > What is the practical purpose of this test?
> 
> In the current QEMU/KVM implementation the SEV* CPUID bits are only
> exposed for SEV guests, so this was more of a sanity check on that. But
> looking at things more closely: that's more of a VMM-specific behavior
> and isn't necessarily an invalid guest configuration as far as the spec
> is concerned, so I think this check should be dropped.
> 
> > 
> > > +	sme_me_mask = 1UL << (ebx & 0x3f);
> > 
> > 	sme_me_mask = BIT_ULL(ebx & 0x3f);
> 
> Will do.

Also, could you please remove the references to set_sev_encryption_mask()
at lines 195 and 572? And perhaps reword those comments too?

Thanks,

Venu

> Thanks,
> 
> Mike
> 
> > 
> > Thx.
> > 
> > -- 
> > Regards/Gruss,
> >     Boris.
> > 
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&amp;data=04%7C01%7Cmichael.roth%40amd.com%7Ca6bf3479fffa4b5eee8b08d9a5fce2e2%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637723327924654730%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=SRy8YSe8a2njNc6IT8CGKv0hUefSOW55DJV%2Fi2Lhkic%3D&amp;reserved=0