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Message-ID: <CAJZ5v0icqWf=ywFJu75fZHAfTKxGup=3j3-Y3u-vXix6OeXbCw@mail.gmail.com>
Date: Tue, 23 Nov 2021 14:13:32 +0100
From: "Rafael J. Wysocki" <rafael@...nel.org>
To: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Cc: Michael Larabel <Michael@...haellarabel.com>,
Len Brown <lenb@...nel.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linux PM <linux-pm@...r.kernel.org>,
"Neri, Ricardo" <ricardo.neri@...el.com>, tim.c.chen@...el.com,
Peter Zijlstra <peterz@...radead.org>,
Arjan van de Ven <arjan@...ux.intel.com>
Subject: Re: [PATCH] cpufreq: intel_pstate: ITMT support for overclocked system
On Fri, Nov 19, 2021 at 2:28 PM Srinivas Pandruvada
<srinivas.pandruvada@...ux.intel.com> wrote:
>
> On Fri, 2021-11-19 at 05:19 -0600, Michael Larabel wrote:
> > On 11/18/21 23:18, Srinivas Pandruvada wrote:
> > > On systems with overclocking enabled, CPPC Highest Performance can
> > > be
> > > hard coded to 0xff. In this case even if we have cores with
> > > different
> > > highest performance, ITMT can't be enabled as the current
> > > implementation
> > > depends on CPPC Highest Performance.
> > >
> > > On such systems we can use MSR_HWP_CAPABILITIES maximum performance
> > > field
> > > when CPPC.Highest Performance is 0xff.
> > >
> > > Due to legacy reasons, we can't solely depend on
> > > MSR_HWP_CAPABILITIES as
> > > in some older systems CPPC Highest Performance is the only way to
> > > identify
> > > different performing cores.
> > >
> > > Reported-by: Michael Larabel <Michael@...haelLarabel.com>
> > > Signed-off-by: Srinivas Pandruvada <
> > > srinivas.pandruvada@...ux.intel.com>
> > > ---
> > > This patch was tested on one Alder Lake system by enabling
> > > Overclocking.
> > > Once overclocking is enabled, we see
> > > $cat /sys/devices/system/cpu/cpu*/acpi_cppc/highest_perf
> > > 255 (P-Cores)
> > > 255 (P-Cores
> > > ...
> > > ...
> > > 255 (E-Cores)
> > > 255 (E-Cores)
> > > The real max performance for CPUs on this system was
> > > 0x40 for P-cores and 0x26 for E-cores.
> > > With this change applied we will see
> > > $cat /proc/sys/kernel/sched_itmt_enabled
> > > 1
> > > The resultant ITMT priorities
> > > for P-core 0x40, P-core HT sibling 0x10 and E-core 0x26
> >
> >
> > With this patch I can confirm that now sched_itmt_enabled = 1 and
> > correct highest_perf with the ASUS ROG STRIX Z690-E GAMING WIFI board
> > on
> > the latest BIOS. Thanks.
> >
> > Tested-by: Michael Larabel <Michael@...haelLarabel.com>
> >
>
> Thanks Michael for confirming.
Applied as 5.16-rc3 material, thank you!
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