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Message-ID: <fa1d802c-43a0-cbec-c16b-c662e3fdf7fa@arm.com>
Date: Wed, 24 Nov 2021 12:56:06 +0000
From: Robin Murphy <robin.murphy@....com>
To: Marc Zyngier <maz@...nel.org>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-pci@...r.kernel.org
Cc: Pali Rohár <pali@...nel.org>,
Alyssa Rosenzweig <alyssa@...enzweig.io>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Mark Kettenis <mark.kettenis@...all.nl>,
Luca Ceresoli <luca@...aceresoli.net>, kernel-team@...roid.com
Subject: Re: [PATCH v3 1/3] PCI: apple: Follow the PCIe specifications when
resetting the port
On 2021-11-23 18:06, Marc Zyngier wrote:
> While the Apple PCIe driver works correctly when directly booted
> from the firmware, it fails to initialise when the kernel is booted
> from a bootloader using PCIe such as u-boot.
>
> That's beacuse we're missing a proper reset of the port (we only
> clear the reset, but never assert it).
>
> The PCIe spec requirements are two-fold:
>
> - #PERST must be asserted before setting up the clocks, and
> stay asserted for at least 100us (Tperst-clk).
>
> - Once #PERST is deasserted, the OS must wait for at least 100ms
> "from the end of a Conventional Reset" before we can start talking
> to the devices
>
> Implementing this results in a booting system.
>
> Fixes: 1e33888fbe44 ("PCI: apple: Add initial hardware bring-up")
> Acked-by: Pali Rohár <pali@...nel.org>
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> Cc: Alyssa Rosenzweig <alyssa@...enzweig.io>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> Cc: Bjorn Helgaas <bhelgaas@...gle.com>
> ---
> drivers/pci/controller/pcie-apple.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c
> index 1bf4d75b61be..957960a733c4 100644
> --- a/drivers/pci/controller/pcie-apple.c
> +++ b/drivers/pci/controller/pcie-apple.c
> @@ -539,13 +539,23 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie,
>
> rmw_set(PORT_APPCLK_EN, port->base + PORT_APPCLK);
>
> + /* Engage #PERST before setting up the clock */
> + gpiod_set_value(reset, 0);
FWIW, given that getting the GPIO with GPIOD_OUT_LOW should have had
this effect in the first place, if this isn't a no-op at this point then
it would hint at something being more significantly wrong down at the
GPIO/pinctrl end :/
Once you fix the polarity in the later patch, though, adding the
explicit reset assertion here does seem a far nicer option than fiddling
the flags to preserve the implicit assertion earlier.
Cheers,
Robin.
> +
> ret = apple_pcie_setup_refclk(pcie, port);
> if (ret < 0)
> return ret;
>
> + /* The minimal Tperst-clk value is 100us (PCIe CMS r2.0, 2.6.2) */
> + usleep_range(100, 200);
> +
> + /* Deassert #PERST */
> rmw_set(PORT_PERST_OFF, port->base + PORT_PERST);
> gpiod_set_value(reset, 1);
>
> + /* Wait for 100ms after #PERST deassertion (PCIe r2.0, 6.6.1) */
> + msleep(100);
> +
> ret = readl_relaxed_poll_timeout(port->base + PORT_STATUS, stat,
> stat & PORT_STATUS_READY, 100, 250000);
> if (ret < 0) {
>
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