[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <DB9PR10MB4652377A18891B66E7449BE880619@DB9PR10MB4652.EURPRD10.PROD.OUTLOOK.COM>
Date: Wed, 24 Nov 2021 14:47:22 +0000
From: Adam Thomson <Adam.Thomson.Opensource@...semi.com>
To: Andrej Picej <andrej.picej@...ik.com>,
Adam Thomson <Adam.Thomson.Opensource@...semi.com>,
Support Opensource <Support.Opensource@...semi.com>,
"lee.jones@...aro.org" <lee.jones@...aro.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"s.riedmueller@...tec.de" <s.riedmueller@...tec.de>
Subject: RE: [PATCH 2/2] mfd: da9063: Make vbcore registers volatile
On 24 November 2021 14:05, Andrej Picej wrote:
> > I don't understand the need for this change. What is this fixing? As I
> > understand it the registers in question aren't volatile so should persist.
>
> So basically this two patches were needed because we needed to enable
> internal LDOs bypass mode on the imx6 and in the process this PMICs regs
> needed to be somehow adjusted, which only worked if this regs were
> marked as volatile. Long story short, this method was only introduced in
> Phytec's version so upstreaming really doesn't make much sense.
>
> I apologize for any inconvenience, but this two patches somehow slipped
> through the process and landed on the "send-to-upstream" list. I also
> talked with @Stefan Rieadmueller and he agreed that this two patches can
> be dropped.
>
> Thanks for your time.
That's no problem and thanks for clarifying. With regmap writes, unless the
value you're writing is the same as is in the cache or is outside of the valid
range, the write should go through. Obviously something else at play in that
platform though. :)
Powered by blists - more mailing lists