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Message-Id: <20211124115659.143839894@linuxfoundation.org>
Date:   Wed, 24 Nov 2021 12:55:28 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Meeta Saggi <msaggi@...estorage.com>,
        Eric Badger <ebadger@...estorage.com>,
        Tony Luck <tony.luck@...el.com>
Subject: [PATCH 4.4 025/162] EDAC/sb_edac: Fix top-of-high-memory value for Broadwell/Haswell

From: Eric Badger <ebadger@...estorage.com>

commit 537bddd069c743759addf422d0b8f028ff0f8dbc upstream.

The computation of TOHM is off by one bit. This missed bit results in
too low a value for TOHM, which can cause errors in regular memory to
incorrectly report:

  EDAC MC0: 1 CE Error at MMIOH area, on addr 0x000000207fffa680 on any memory

Fixes: 50d1bb93672f ("sb_edac: add support for Haswell based systems")
Cc: stable@...r.kernel.org
Reported-by: Meeta Saggi <msaggi@...estorage.com>
Signed-off-by: Eric Badger <ebadger@...estorage.com>
Signed-off-by: Tony Luck <tony.luck@...el.com>
Link: https://lore.kernel.org/r/20211010170127.848113-1-ebadger@purestorage.com
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
 drivers/edac/sb_edac.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -848,7 +848,7 @@ static u64 haswell_get_tohm(struct sbrid
 	pci_read_config_dword(pvt->info.pci_vtd, HASWELL_TOHM_1, &reg);
 	rc = ((reg << 6) | rc) << 26;
 
-	return rc | 0x1ffffff;
+	return rc | 0x3ffffff;
 }
 
 static u64 haswell_rir_limit(u32 reg)


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