lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 25 Nov 2021 14:18:48 +0200
From:   Roger Quadros <rogerq@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        tony@...mide.com
Cc:     kishon@...com, nm@...com, vigneshr@...com,
        linux-omap@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH 1/4] dt-bindings: memory-controllers: ti,gpmc: Add
 compatible for AM64



On 23/11/2021 21:47, Krzysztof Kozlowski wrote:
> On 23/11/2021 11:26, Roger Quadros wrote:
>> AM64 SoC contains the GPMC module. Add compatible for it.
>>
>> Newer SoCs don't necessarily map GPMC data region at the same place
>> as legacy SoCs. Add reg-names "data", to provide this information to
>> the device driver.
>>
>> Cc: Rob Herring <robh+dt@...nel.org>
>> Signed-off-by: Roger Quadros <rogerq@...nel.org>
>> ---
>>  .../bindings/memory-controllers/ti,gpmc.yaml         | 12 +++++++++++-
>>  1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
>> index 25b42d68f9b3..1869cc6f949b 100644
>> --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
>> +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
>> @@ -23,13 +23,20 @@ properties:
>>      items:
>>        - enum:
>>            - ti,am3352-gpmc
>> +          - ti,am64-gpmc
>>            - ti,omap2420-gpmc
>>            - ti,omap2430-gpmc
>>            - ti,omap3430-gpmc
>>            - ti,omap4430-gpmc
>>  
>>    reg:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 2
>> +
>> +  reg-names:
>> +    items:
>> +      - const: cfg
>> +      - const: data
> 
> I see your driver handles cases with only one reg item, but I have other

The support for these two items is added in patch 3 of this series "memory: omap-gpmc: Add support for GPMC on AM64 SoC"

> question - is it correct to have older (ARMv7) platform with two reg
> items? Or can am64-gpmc come with only one reg?

Older platforms currently have only one reg, but they can be updated to come with two without breaking functionality.
am64-gpmc cannot come with one reg as the defaults for data window are not suitable for AM64.

All legacy platforms were using a fixed Data IO window (first 1 GB) but from AM64 this was moved elsewhere, so the need for this change.

> IOW, I am surprised there is no if-else case precising this minItems
> requirement for different SocS.
> 

OK. I will add this.

>>  
>>    interrupts:
>>      maxItems: 1
>> @@ -44,6 +51,9 @@ properties:
>>      items:
>>        - const: fck
>>  
>> +  power-domains:
>> +    maxItems: 1
> 
> Similar, but looks like a weaker requirement - could an older SoC define
> power-domain?

No. Will add SoC specific constraint for this as well.

> 
>> +
>>    dmas:
>>      items:
>>        - description: DMA channel for GPMC NAND prefetch
>>
> 
> 
> Best regards,
> Krzysztof
> 

cheers,
-roger

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ