Message-ID: <acbce921-8bec-2593-0a74-18f0f0b2661e@foss.st.com>
Date:   Thu, 25 Nov 2021 17:05:18 +0100
From:   Alexandre TORGUE <alexandre.torgue@...s.st.com>
To:     <reinhold.mueller@...rion.com>, <robh+dt@...nel.org>
CC:     <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] arm: dts: stm32mp157c: Add support for the emtrion
 emSBC-Argon

Hi Reinhold

On 11/24/21 4:54 PM, reinhold.mueller@...rion.com wrote:
> From: Reinhold Mueller <reinhold.mueller@...rion.de>
> 
> This patch adds support for the emtrion GmbH Argon board series.
> They are available with STM32MP157 from STMicroelectronics
> with 512 MByte Memory.
> 
> The devicetree stm32mp157c-emstamp-argon.dtsi is the common part providing
> the module components and the basic support for the SoC. The support for
> the emSBC-Argon baseboard in the developer-kit configuration is provided
> by the stm32mp157c-emsbc-argon.dts file.
> 
> Signed-off-by: Reinhold Mueller <reinhold.mueller@...rion.de>
> ---
>   .../devicetree/bindings/arm/stm32/stm32.yaml  |   8 +
>   arch/arm/boot/dts/Makefile                    |   1 +
>   arch/arm/boot/dts/stm32mp157c-emsbc-argon.dts |  53 ++
>   .../boot/dts/stm32mp157c-emstamp-argon.dtsi   | 665 ++++++++++++++++++
>   4 files changed, 727 insertions(+)
>   create mode 100644 arch/arm/boot/dts/stm32mp157c-emsbc-argon.dts
>   create mode 100644 arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
> 

Can you split DT patches and yaml patch please? Note, for DT patches 
title should start by "ARM: dts: stm32: Add support for the stm32mp157 
emSBC-Argon'

> diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
> index bcaf7be3ab37..710230847dcd 100644
> --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
> +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
> @@ -28,6 +28,14 @@ properties:
>             - enum:
>                 - st,stm32mp153
>                 - st,stm32mp157
> +
> +      - description: emtrion STM32MP1 Argon based Boards
> +        items:
> +          - enum:
> +              - emtrion,stm32mp157c-emsbc-argon
> +          - enum:
> +              - emtrion,stm32mp157c-emstamp-argon
> +          - const: st,stm32mp157
>         - items:
>             - enum:
>                 - st,stm32f429i-disco
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 8a2dfdf01ce3..a76226293f18 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1146,6 +1146,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
>   	stm32mp157c-dhcom-picoitx.dtb \
>   	stm32mp157c-dk2.dtb \
>   	stm32mp157c-ed1.dtb \
> +	stm32mp157c-emsbc-argon.dtb \
>   	stm32mp157c-ev1.dtb \
>   	stm32mp157c-lxa-mc1.dtb \
>   	stm32mp157c-odyssey.dtb
> diff --git a/arch/arm/boot/dts/stm32mp157c-emsbc-argon.dts b/arch/arm/boot/dts/stm32mp157c-emsbc-argon.dts
> new file mode 100644
> index 000000000000..3ec873b1ba2d
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157c-emsbc-argon.dts
> @@ -0,0 +1,53 @@
> +// SPDX-License-Identifier: (GPL-2.0 or MIT)
> +//
> +// Copyright (c) 2021 emtrion GmbH
> +// Author: Reinhold Müller <reinhold.mueller@...rion.de>.
> +//
> +
> +/dts-v1/;
> +
> +#include "stm32mp157c-emstamp-argon.dtsi"
> +
> +/ {
> +	model = "emtrion STM32MP157C emSBC-Argon Developer Board";
> +	compatible = "emtrion,stm32mp157c-emsbc-argon", "emtrion,stm32mp157c-emstamp-argon",
> +			"st,stm32mp157";
> +
> +	led: gpio_leds {
> +		compatible = "gpio-leds";
> +		led2 {
> +			label = "red";
> +			gpios = <&gpiof 12 GPIO_ACTIVE_LOW>;
> +			linux,default-trigger = "none";
> +			default-state = "off";
> +		};
> +		led3 {
> +			label = "green";
> +			gpios = <&gpioe 7 GPIO_ACTIVE_LOW>;
> +			linux,default-trigger = "none";
> +			default-state = "off";
> +		};
> +	};
> +};
> +
> +&dac {
> +	status = "okay";
> +};
> +
> +&sdmmc1 {
> +	pinctrl-names = "default", "opendrain", "sleep";
> +	pinctrl-0 = <&sdmmc1_b4_pins_a>;
> +	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
> +	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
> +	cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> +	disable-wp;
> +	st,neg-edge;
> +	bus-width = <4>;
> +	vmmc-supply = <&vdd_sd>;
> +	status = "okay";
> +};
> +
> +&spi1 {
> +	status = "okay";
> +};
> +
> diff --git a/arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi b/arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
> new file mode 100644
> index 000000000000..bcd6a2a687cf
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
> @@ -0,0 +1,665 @@
> +// SPDX-License-Identifier: (GPL-2.0 or MIT)
> +//
> +// Copyright (c) 2021 emtrion GmbH
> +// Author: Reinhold Müller <reinhold.mueller@...rion.de>.
> +//
> +
> +#include "stm32mp157.dtsi"
> +#include "stm32mp15xc.dtsi"
> +#include "stm32mp15-pinctrl.dtsi"
> +#include "stm32mp15xxac-pinctrl.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/mfd/st,stpmic1.h>
> +
> +/ {
> +	aliases {
> +		ethernet0 = &ethernet0;
> +		serial0 = &uart4;
> +		serial1 = &usart2;
> +		serial2 = &usart3;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	memory@...00000 {
> +		device_type = "memory";
> +		reg = <0xc0000000 0x20000000>;
> +	};
> +
> +	reserved-memory {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		mcuram2: mcuram2@...00000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x10000000 0x40000>;
> +			no-map;
> +		};
> +
> +		vdev0vring0: vdev0vring0@...40000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x10040000 0x2000>;
> +			no-map;
> +		};
> +
> +		vdev0vring1: vdev0vring1@...42000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x10042000 0x2000>;
> +			no-map;
> +		};
> +
> +		vdev0buffer: vdev0buffer@...44000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x10044000 0x4000>;
> +			no-map;
> +		};
> +
> +		mcuram: mcuram@...00000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x30000000 0x40000>;
> +			no-map;
> +		};
> +
> +		retram: retram@...00000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x38000000 0x10000>;
> +			no-map;
> +		};
> +
> +		gpu_reserved: gpu@...00000 {
> +			reg = <0xdc000000 0x4000000>;
> +			no-map;
> +		};
> +	};
> +
> +	led: gpio_leds {
> +		compatible = "gpio-leds";
> +		led0 {

Regarding yaml file, led-0 should be used.

> +			label = "panic";
> +			gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
> +			linux,default-trigger = "none";
> +			default-state = "off";
> +			panic-indicator;
> +		};
> +		led1 {
> +			label = "heartbeat";
> +			gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
> +			linux,default-trigger = "heartbeat";
> +			default-state = "on";
> +		};
> +	};
> +};
> +
> +&adc {
> +/*	pinctrl-names = "default"; */
> +/*	pinctrl-0 = <&adc1_in6_pins_a>; */
> +	vdd-supply = <&vdd>;
> +	vdda-supply = <&vdd>;
> +	vref-supply = <&vrefbuf>;
> +	status = "okay";
> +
> +	adc1: adc@0 {
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&adc1_in6_pins_a>;
> +		st,min-sample-time-nsecs = <5000>;
> +		st,adc-channels = <6>;
> +		status = "disabled";
> +	};
> +
> +	adc2: adc@100 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		status = "okay";
> +		channel@12 {
> +			reg = <12>;
> +			label = "sense_temp";
> +			st,min-sample-time-ns = <9000>;
> +		};
> +		channel@15 {
> +			reg = <15>;
> +			label = "vbat";
> +			st,min-sample-time-ns = <9000>;
> +		};
> +		channel@16 {
> +			reg = <16>;
> +			label = "dac_out1";
> +			st,min-sample-time-ns = <9000>;
> +		};
> +		channel@17 {
> +			reg = <17>;
> +			label = "dac_out1";
> +			st,min-sample-time-ns = <9000>;
> +		};
> +	};
> +};
> +
> +&crc1 {
> +	status = "okay";
> +};
> +
> +&cryp1 {
> +	status = "okay";
> +};
> +
> +&dac {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
> +	vref-supply = <&vdda>;
> +	status = "disabled";
> +
> +	dac1: dac@1 {
> +		status = "okay";
> +	};
> +	dac2: dac@2 {
> +		status = "okay";
> +	};
> +};
> +
> +&dts {
> +	status = "okay";
> +};
> +
> +&ethernet0 {
> +	status = "okay";
> +	snps,reset-gpio = <&gpioa 1 GPIO_ACTIVE_LOW>;
> +	snps,reset-active-low;
> +	snps,reset-delays-us = <0 30000 50000>;
> +	pinctrl-0 = <&ethernet0_rmii_pins>;
> +	pinctrl-1 = <&ethernet0_rmii_pins_sleep>;
> +	pinctrl-names = "default", "sleep";
> +	phy-mode = "rmii";
> +	max-speed = <100>;
> +	phy-handle = <&phy0>;
> +	clock-names = "stmmaceth",
> +			"mac-clk-tx",
> +			"mac-clk-rx",
> +			"ethstp",
> +			"eth-ck",
> +			"syscfg-clk";
> +	clocks = <&rcc ETHMAC>,
> +			 <&rcc ETHTX>,
> +			 <&rcc ETHRX>,
> +			 <&rcc ETHSTP>,
> +			 <&rcc ETHCK_K>,
> +			 <&rcc SYSCFG>;

Why do you update clocks here ? If one is missingit should be declared 
in stm32mp151.dtis file.

> +	st,eth-ref-clk-sel;
> +
> +	mdio0 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "snps,dwmac-mdio";
> +		phy0: ethernet-phy@0 {
> +			reg = <0>;
> +		};
> +	};
> +};
> +
> +&gpu {
> +	contiguous-area = <&gpu_reserved>;
> +};
> +
> +&hash1 {
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&i2c1_pins_a>;
> +	pinctrl-1 = <&i2c1_sleep_pins_a>;
> +	i2c-scl-rising-time-ns = <100>;
> +	i2c-scl-falling-time-ns = <7>;
> +	status = "disabled";
> +	/delete-property/dmas;
> +	/delete-property/dma-names;
> +};
> +
> +&i2c4 {
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&i2c4_pins_a>;
> +	pinctrl-1 = <&i2c4_sleep_pins_a>;
> +	i2c-scl-rising-time-ns = <185>;
> +	i2c-scl-falling-time-ns = <20>;
> +	status = "okay";
> +	/delete-property/dmas;
> +	/delete-property/dma-names;
> +
> +	pmic: stpmic@33 {
> +		compatible = "st,stpmic1";
> +		reg = <0x33>;
> +		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +		status = "okay";
> +
> +		regulators {
> +			compatible = "st,stpmic1-regulators";
> +
> +			ldo1-supply = <&v3v3>;
> +			ldo3-supply = <&vdd_ddr>;
> +			ldo6-supply = <&v3v3>;
> +			pwr_sw1-supply = <&bst_out>;
> +			pwr_sw2-supply = <&bst_out>;
> +
> +			vddcore: buck1 {
> +				regulator-name = "vddcore";
> +				regulator-min-microvolt = <1200000>;
> +				regulator-max-microvolt = <1350000>;
> +				regulator-always-on;
> +				regulator-initial-mode = <0>;
> +				regulator-over-current-protection;
> +			};
> +
> +			vdd_ddr: buck2 {
> +				regulator-name = "vdd_ddr";
> +				regulator-min-microvolt = <1350000>;
> +				regulator-max-microvolt = <1350000>;
> +				regulator-always-on;
> +				regulator-initial-mode = <0>;
> +				regulator-over-current-protection;
> +			};
> +
> +			vdd: buck3 {
> +				regulator-name = "vdd";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +				st,mask-reset;
> +				regulator-initial-mode = <0>;
> +				regulator-over-current-protection;
> +			};
> +
> +			v3v3: buck4 {
> +				regulator-name = "v3v3";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +				regulator-over-current-protection;
> +				regulator-initial-mode = <0>;
> +			};
> +
> +			v1v8_audio: ldo1 {
> +				regulator-name = "v1v8_audio";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				interrupts = <IT_CURLIM_LDO1 0>;
> +			};
> +
> +			v3v3_hdmi: ldo2 {
> +				regulator-name = "v3v3_hdmi";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +				interrupts = <IT_CURLIM_LDO2 0>;
> +			};
> +
> +			vtt_ddr: ldo3 {
> +				regulator-name = "vtt_ddr";
> +				regulator-min-microvolt = <500000>;
> +				regulator-max-microvolt = <750000>;
> +				regulator-always-on;
> +				regulator-over-current-protection;
> +			};
> +
> +			vdd_usb: ldo4 {
> +				regulator-name = "vdd_usb";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				interrupts = <IT_CURLIM_LDO4 0>;
> +			};
> +
> +			vdd_sd: ldo5 {
> +				regulator-name = "vdd_sd";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				interrupts = <IT_CURLIM_LDO5 0>;
> +				regulator-always-on;
> +			};
> +
> +			vdda: ldo6 {
> +				regulator-name = "vdda";
> +				regulator-min-microvolt = <2900000>;
> +				regulator-max-microvolt = <2900000>;
> +				regulator-always-on;
> +				interrupts = <IT_CURLIM_LDO6 0>;
> +				regulator-boot-on;
> +			};
> +
> +			vref_ddr: vref_ddr {
> +				regulator-name = "vref_ddr";
> +				regulator-always-on;
> +				regulator-over-current-protection;
> +			};
> +
> +			bst_out: boost {
> +				regulator-name = "bst_out";
> +				interrupts = <IT_OCP_BOOST 0>;
> +			};
> +
> +			vbus_otg: pwr_sw1 {
> +				regulator-name = "vbus_otg";
> +				interrupts = <IT_OCP_OTG 0>;
> +				regulator-active-discharge;
> +			};
> +
> +			vbus_usbh: pwr_sw2 {
> +				regulator-name = "usbh_vbus";
> +				interrupts = <IT_OCP_SWOUT 0>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +			};
> +		};
> +
> +		onkey {
> +			compatible = "st,stpmic1-onkey";
> +			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
> +			interrupt-names = "onkey-falling", "onkey-rising";
> +			status = "okay";
> +		};
> +
> +		watchdog {
> +			compatible = "st,stpmic1-wdt";
> +			status = "disabled";
> +		};
> +	};
> +};
> +
> +&i2c5 {
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&i2c5_pins_a>;
> +	pinctrl-1 = <&i2c5_sleep_pins_a>;
> +	i2c-scl-rising-time-ns = <185>;
> +	i2c-scl-falling-time-ns = <20>;
> +	status = "disabled";
> +	/delete-property/dmas;
> +	/delete-property/dma-names;
> +};
> +
> +&i2s2 {
> +	status = "disabled";
> +};
> +

Do you really need to set it as disabled ?


> +&ipcc {
> +	status = "okay";
> +};
> +
> +&iwdg2 {
> +	timeout-sec = <32>;
> +	status = "okay";
> +};
> +
> +&m4_rproc {
> +	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
> +			<&vdev0vring1>, <&vdev0buffer>;
> +	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
> +	mbox-names = "vq0", "vq1", "shutdown";
> +	interrupt-parent = <&exti>;
> +	interrupts = <68 1>;
> +	interrupt-names = "wdg";
> +	recovery;
> +	status = "okay";
> +};
> +
> +&pinctrl {

Add your pin configurations in stm32mp15-pinctrl please.

> +	ethernet0_rmii_pins: eth0_mx-0 {
> +		pins1 {
> +			pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
> +				<STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
> +				<STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
> +				<STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
> +			bias-disable;
> +			drive-push-pull;
> +			slew-rate = <1>;
> +		};
> +		pins2 {
> +			pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
> +			bias-disable;
> +			drive-push-pull;
> +			slew-rate = <0>;
> +		};
> +		pins3 {
> +			pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
> +				<STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
> +				<STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
> +			bias-disable;
> +		};
> +		pins4 {
> +			pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
> +		};
> +	};
> +
> +	ethernet0_rmii_pins_sleep: eth1_sleep_mx-0 {
> +		pins {
> +			pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
> +				<STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
> +				<STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */
> +				<STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
> +				<STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
> +				<STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
> +				<STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
> +				<STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
> +				<STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
> +		};
> +	};
> +
> +	pwm1_pins_a: pwm1-0 {
> +		pins {
> +			pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
> +			bias-pull-down;
> +			drive-push-pull;
> +			slew-rate = <0>;
> +		};
> +	};
> +
> +	pwm1_sleep_pins_a: pwm1-sleep-0 {
> +		pins {
> +			pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
> +		};
> +	};
> +
> +	usart3_pins_a: usart3-0 {
> +		pins1 {
> +			pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
> +				 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
> +			bias-disable;
> +			drive-push-pull;
> +			slew-rate = <0>;
> +		};
> +		pins2 {
> +			pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
> +				 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
> +			bias-disable;
> +		};
> +	};
> +
> +	usart3_idle_pins_a: usart3-idle-0 {
> +		pins1 {
> +			pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
> +				 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
> +				 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
> +		};
> +		pins2 {
> +			pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
> +			bias-disable;
> +		};
> +	};
> +
> +	usart3_sleep_pins_a: usart3-sleep-0 {
> +		pins {
> +			pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
> +				 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
> +				 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
> +				 <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */
> +		};
> +	};
> +};
> +
> +&pwr_regulators {
> +	vdd-supply = <&vdd>;
> +	vdd_3v3_usbfs-supply = <&vdd_usb>;
> +};
> +
> +&qspi {
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
> +	pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
> +	reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	flash0: is25lp016d@0 {
> +		compatible = "jedec,spi-nor";
> +		reg = <0>;
> +		spi-max-frequency = <133000000>;
> +		spi-rx-bus-width = <1>;
> +		spi-tx-bus-width = <1>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +	};
> +};
> +
> +&rng1 {
> +	status = "okay";
> +};
> +
> +&rtc {
> +	status = "okay";
> +};
> +
> +&sdmmc2 {
> +	arm,primecell-periphid = <0x10153180>;
> +	pinctrl-names = "default", "opendrain", "sleep";
> +	pinctrl-0 = <&sdmmc2_b4_pins_b>;
> +	pinctrl-1 = <&sdmmc2_b4_od_pins_b>;
> +	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
> +	non-removable;
> +	st,neg-edge;
> +	bus-width = <4>;
> +	vmmc-supply = <&v3v3>;
> +	status = "okay";
> +};
> +
> +&spi1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&spi1_pins_a>;
> +	cs-gpios = <&gpioz 3 0>;
> +	status = "disabled";
> +
> +	spidev@0  {
> +		compatible = "spidev";
> +		reg = <0>;
> +		spi-max-frequency = <100000>;
> +	};
> +};
> +
> +&timers1 {
> +	/* spare dmas for other usage */
> +	/delete-property/dmas;
> +	/delete-property/dma-names;
> +	pwm {
> +		pinctrl-0 = <&pwm1_pins_a>;
> +		pinctrl-1 = <&pwm1_sleep_pins_a>;
> +		pinctrl-names = "default", "sleep";
> +		status = "okay";
> +	};
> +	timer@0 {
> +		status = "okay";
> +	};
> +};
> +
> +&timers4 {
> +	/delete-property/dmas;
> +	/delete-property/dma-names;
> +	pwm {
> +		pinctrl-0 = <&pwm4_pins_b>;
> +		pinctrl-1 = <&pwm4_sleep_pins_b>;
> +		pinctrl-names = "default", "sleep";
> +		status = "okay";
> +	};
> +	timer@3 {
> +		status = "okay";
> +	};
> +};
> +
> +&timers5 {
> +	/delete-property/dmas;
> +	/delete-property/dma-names;
> +	pwm {
> +		pinctrl-0 = <&pwm5_pins_a>;
> +		pinctrl-1 = <&pwm5_sleep_pins_a>;
> +		pinctrl-names = "default", "sleep";
> +		status = "okay";
> +	};
> +	timer@4 {
> +		status = "okay";
> +	};
> +};
> +
> +&uart4 {
> +	pinctrl-names = "default", "sleep", "idle";
> +	pinctrl-0 = <&uart4_pins_a>;
> +	pinctrl-1 = <&uart4_sleep_pins_a>;
> +	pinctrl-2 = <&uart4_idle_pins_a>;
> +	status = "okay";
> +};
> +
> +&usart2 {
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&usart2_pins_a>;
> +	pinctrl-1 = <&usart2_sleep_pins_a>;
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	pinctrl-names = "default", "sleep", "idle";
> +	pinctrl-0 = <&usart3_pins_a>;
> +	pinctrl-1 = <&usart3_sleep_pins_a>;
> +	pinctrl-2 = <&usart3_idle_pins_a>;
> +	status = "okay";
> +};
> +
> +&usbh_ehci {
> +	phys = <&usbphyc_port0>;
> +	phy-names = "usb";
> +	status = "okay";
> +};
> +
> +&usbh_ohci {
> +	phys = <&usbphyc_port0>;
> +	phy-names = "usb";
> +	status = "okay";
> +};
> +
> +&usbotg_hs {
> +	dr_mode = "peripheral";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&usbotg_hs_pins_a>;
> +	phy-names = "usb2-phy";
> +	phys = <&usbphyc_port1 0>;
> +	vbus-supply = <&vbus_otg>;
> +	status = "okay";
> +};
> +
> +&usbphyc {
> +	status = "okay";
> +};
> +
> +&usbphyc_port0 {
> +	phy-supply = <&vdd_usb>;
> +};
> +
> +&usbphyc_port1 {
> +	phy-supply = <&vdd_usb>;
> +};
> +
> +&vrefbuf {
> +	regulator-min-microvolt = <2500000>;
> +	regulator-max-microvolt = <2500000>;
> +	vdda-supply = <&vdd>;
> +	status = "okay";
> +};
> +
> 

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