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Message-ID: <878rxckw0a.ffs@tglx>
Date:   Thu, 25 Nov 2021 18:03:49 +0100
From:   Thomas Gleixner <tglx@...utronix.de>
To:     isaku.yamahata@...el.com, Ingo Molnar <mingo@...hat.com>,
        Borislav Petkov <bp@...en8.de>,
        "H . Peter Anvin" <hpa@...or.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, erdemaktas@...gle.com,
        Connor Kuehl <ckuehl@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Cc:     isaku.yamahata@...el.com, isaku.yamahata@...il.com,
        Xiaoyao Li <xiaoyao.li@...el.com>
Subject: Re: [RFC PATCH v3 02/59] x86/mtrr: mask out keyid bits from
 variable mtrr mask register

On Thu, Nov 25 2021 at 09:36, Thomas Gleixner wrote:
>>  
>> +			if (boot_cpu_has(X86_FEATURE_TME)) {

cpu_feature_enabled() as Borislav pointed out several times already.

>> +				u64 tme_activate;
>> +
>> +				rdmsrl(MSR_IA32_TME_ACTIVATE, tme_activate);
>> +				if (TME_ACTIVATE_LOCKED(tme_activate) &&
>> +				    TME_ACTIVATE_ENABLED(tme_activate)) {
>> +					phys_addr -= TME_ACTIVATE_KEYID_BITS(tme_activate);
>> +				}
>> +			}
>>  			size_or_mask = SIZE_OR_MASK_BITS(phys_addr);
>>  			size_and_mask = ~size_or_mask & 0xfffff00000ULL;
>>  		} else if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR &&

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