linux-kernel - RE: [PATCH v6 2/2] clocksource: Add Intel Keem Bay timer support

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Message-ID: <BN9PR11MB5545B71113E29434FB5EA96FF1629@BN9PR11MB5545.namprd11.prod.outlook.com>
Date:   Thu, 25 Nov 2021 17:29:27 +0000
From:   "Sanil, Shruthi" <shruthi.sanil@...el.com>
To:     Thomas Gleixner <tglx@...utronix.de>,
        "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC:     "andriy.shevchenko@...ux.intel.com" 
        <andriy.shevchenko@...ux.intel.com>,
        "kris.pan@...ux.intel.com" <kris.pan@...ux.intel.com>,
        "mgross@...ux.intel.com" <mgross@...ux.intel.com>,
        "Thokala, Srikanth" <srikanth.thokala@...el.com>,
        "Raja Subramanian, Lakshmi Bai" 
        <lakshmi.bai.raja.subramanian@...el.com>,
        "Sangannavar, Mallikarjunappa" 
        <mallikarjunappa.sangannavar@...el.com>
Subject: RE: [PATCH v6 2/2] clocksource: Add Intel Keem Bay timer support

Hi Thomas

> -----Original Message-----
> From: Sanil, Shruthi
> Sent: Thursday, November 11, 2021 4:12 PM
> To: Thomas Gleixner <tglx@...utronix.de>; daniel.lezcano@...aro.org;
> robh+dt@...nel.org; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org
> Cc: andriy.shevchenko@...ux.intel.com; kris.pan@...ux.intel.com;
> mgross@...ux.intel.com; Thokala, Srikanth <srikanth.thokala@...el.com>;
> Raja Subramanian, Lakshmi Bai <lakshmi.bai.raja.subramanian@...el.com>;
> Sangannavar, Mallikarjunappa <mallikarjunappa.sangannavar@...el.com>
> Subject: RE: [PATCH v6 2/2] clocksource: Add Intel Keem Bay timer support
> 
> > -----Original Message-----
> > From: Thomas Gleixner <tglx@...utronix.de>
> > Sent: Monday, September 27, 2021 3:11 AM
> > To: Sanil, Shruthi <shruthi.sanil@...el.com>;
> > daniel.lezcano@...aro.org;
> > robh+dt@...nel.org; linux-kernel@...r.kernel.org;
> > devicetree@...r.kernel.org
> > Cc: andriy.shevchenko@...ux.intel.com; kris.pan@...ux.intel.com;
> > mgross@...ux.intel.com; Thokala, Srikanth
> > <srikanth.thokala@...el.com>; Raja Subramanian, Lakshmi Bai
> > <lakshmi.bai.raja.subramanian@...el.com>;
> > Sangannavar, Mallikarjunappa <mallikarjunappa.sangannavar@...el.com>;
> > Sanil, Shruthi <shruthi.sanil@...el.com>
> > Subject: Re: [PATCH v6 2/2] clocksource: Add Intel Keem Bay timer
> > support
> >
> > On Tue, Sep 07 2021 at 00:06, shruthi sanil wrote:
> > > +
> > > +/* Provides a unique ID for each timer */ static
> > > +DEFINE_IDA(keembay_timer_ida);
> >
> > > +
> > > +	timer_id = ida_alloc(&keembay_timer_ida, GFP_KERNEL);
> > > +	if (timer_id < 0) {
> > > +		ret = timer_id;
> > > +		goto err_keembay_ce_to_free;
> > > +	}
> >
> > May I ask what the purpose of the IDA, which is backed by a full blown
> > xarray, is here?
> >
> > AFAICT all you want is a unique number for the timer name for up to 8
> > timers.
> >
> > > +	timer_name = kasprintf(GFP_KERNEL, "keembay_timer%d",
> > timer_id);
> >
> > So what's wrong about:
> >
> > static unsigned int keembay_timer_id;
> >
> > 	timer_name = kasprintf(GFP_KERNEL, "keembay_timer%d",
> > keembay_timer_id++);
> >
> > Hmm?
> 
> Yes, we had initially implemented it in the similar way, but in the course of
> review it got changed to use IDA.
> 
> >
> > > +
> > > +	clockevents_config_and_register(&keembay_ce_to->clkevt,
> > > +					timer_of_rate(keembay_ce_to),
> > > +					1,
> > > +					U32_MAX);
> >
> > Aside of that what's the point of registering more than one of those
> > timers as clock event? The core will only use one and the rest is just
> > going to use memory for no value.
> 
> Instead of
> keembay_ce_to->clkevt.cpumask = cpumask_of(0); can I update it as
> keembay_ce_to->clkevt.cpumask = cpu_possible_mask; so that each timer
> would be associated with different cores?
> 

Could you please help me with the above query?

Thanks,
Shruthi

> Thanks,
> Shruthi
> 
> >
> > Thanks,
> >
> >         tglx