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Message-ID: <db4731a5-56b9-f1f8-2d3f-c62bb7e3b91a@gmail.com>
Date: Thu, 25 Nov 2021 20:44:16 +0100
From: Johan Jonker <jbx6244@...il.com>
To: Michael Riesch <michael.riesch@...fvision.net>,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: s.hauer@...gutronix.de, benjamin.gaignard@...labora.com,
hjc@...k-chips.com, heiko@...ech.de, pgwipeout@...il.com
Subject: Re: [PATCH] arm64: dts: rockchip: enable vop2 and hdmi tx on
quartz64a
On 11/17/21 4:44 PM, Michael Riesch wrote:
> Enable the RK356x Video Output Processor (VOP) 2 on the Pine64
> Quartz64 Model A.
>
> Signed-off-by: Michael Riesch <michael.riesch@...fvision.net>
> ---
> .../boot/dts/rockchip/rk3566-quartz64-a.dts | 24 +++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> index 4d4b2a301b1a..9fba790c6af4 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> @@ -205,6 +205,16 @@ &gmac1m0_clkinout
> status = "okay";
> };
>
> +&hdmi {
> + status = "okay";
> + avdd-0v9-supply = <&vdda_0v9>;
> + avdd-1v8-supply = <&vcc_1v8>;
Heiko's sort rules:
compatible
reg
interrupts
[alphabetical]
status [if needed]
> +};
> +
> +&hdmi_in_vp0 {
> + status = "okay";
> +};
> +
> &i2c0 {
> status = "okay";
>
> @@ -546,3 +556,17 @@ bluetooth {
> &uart2 {
> status = "okay";
> };
> +
> +&vop {
> + status = "okay";
status below
> + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
> + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
> +};
> +
> +&vop_mmu {
> + status = "okay";
> +};
> +
> +&vp0_out_hdmi {
> + status = "okay";
> +};
>
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