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Message-ID: <1638185497-26477-5-git-send-email-quic_rjendra@quicinc.com>
Date:   Mon, 29 Nov 2021 17:01:37 +0530
From:   Rajendra Nayak <quic_rjendra@...cinc.com>
To:     <agross@...nel.org>, <bjorn.andersson@...aro.org>,
        <robh+dt@...nel.org>
CC:     <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <dianders@...omium.org>,
        <mka@...omium.org>, <kgodara@...eaurora.org>,
        Kshitiz Godara <kgodara1@...eaurora.org>,
        "Rajendra Nayak" <quic_rjendra@...cinc.com>
Subject: [PATCH v2 4/4] arm64: dts: qcom: sc7280-crd: Add Touchscreen and touchpad support

From: Kshitiz Godara <kgodara1@...eaurora.org>

Add Touchscreen and touchpad hid-over-i2c node for the sc7280 CRD board

Signed-off-by: Kshitiz Godara <kgodara1@...eaurora.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280-crd.dts | 61 +++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
index 1e3e2f3..fcfb14d 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
@@ -23,6 +23,47 @@
 	};
 };
 
+ap_tp_i2c: &i2c0 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	trackpad: trackpad@15 {
+		compatible = "hid-over-i2c";
+		reg = <0x15>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&tp_int_odl>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+
+		post-power-on-delay-ms = <20>;
+		hid-descr-addr = <0x0001>;
+		vdd-supply = <&vreg_l18b_1p8>;
+
+		wakeup-source;
+	};
+};
+
+ap_ts_pen_1v8: &i2c13 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	ap_ts: touchscreen@5c {
+		compatible = "hid-over-i2c";
+		reg = <0x5C>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
+
+		post-power-on-delay-ms = <500>;
+		hid-descr-addr = <0x0000>;
+
+		vdd-supply = <&vreg_l19b_1p8>;
+	};
+};
+
 &nvme_3v3_regulator {
 	gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
 };
@@ -30,3 +71,23 @@
 &nvme_pwren {
 	pins = "gpio51";
 };
+
+&tlmm {
+	tp_int_odl: tp-int-odl {
+		pins = "gpio7";
+		function = "gpio";
+		bias-disable;
+	};
+
+	ts_int_l: ts-int-l {
+		pins = "gpio55";
+		function = "gpio";
+		bias-pull-up;
+	};
+
+	ts_reset_l: ts-reset-l {
+		pins = "gpio54";
+		function = "gpio";
+		bias-disable;
+	};
+};
-- 
2.7.4

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