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Message-ID: <dee30442-8a78-07f3-1fa1-e5922a510182@somainline.org>
Date:   Tue, 30 Nov 2021 20:59:03 +0100
From:   Konrad Dybcio <konrad.dybcio@...ainline.org>
To:     Stephen Boyd <sboyd@...nel.org>,
        ~postmarketos/upstreaming@...ts.sr.ht
Cc:     martin.botka@...ainline.org,
        angelogioacchino.delregno@...ainline.org,
        marijn.suijten@...ainline.org, jamipkettunen@...ainline.org,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 04/16] arm64: dts: qcom: sm8350: Specify clock-frequency
 for arch timer


On 30/11/2021 03:05, Stephen Boyd wrote:
> Quoting Konrad Dybcio (2021-11-13 17:27:43)
>> Arch timer runs at 19.2 MHz. Specify the rate in the timer node.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
>> index a30ba3193d84..60866a20a55c 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
>> @@ -2484,5 +2484,6 @@ timer {
>>                               <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>>                               <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>>                               <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
>> +               clock-frequency = <19200000>;
> Does the firmware not set the frequency properly?

It does on my device on the current firmware version (it wouldn't really 
boot if it didn't, no?),

but who knows if it always will, or if it always has been..


It's present in downstream too, so I reckon it does not hurt to have it 
here too, even

for completeness-of-describing-the-machine-properly sake.


Konrad

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