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Message-ID: <YaXY+E2Uto4O43c3@rocinante>
Date: Tue, 30 Nov 2021 08:55:36 +0100
From: Krzysztof Wilczyński <kw@...ux.com>
To: Rob Herring <robh@...nel.org>
Cc: Toan Le <toan@...amperecomputing.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Andrew Murray <amurray@...goodpenguin.co.uk>,
Stéphane Graber <stgraber@...ntu.com>,
stable@...r.kernel.org, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: xgene: Fix IB window setup
Hi,
> Commit 6dce5aa59e0b ("PCI: xgene: Use inbound resources for setup")
> broke PCI support on XGene. The cause is the IB resources are now sorted
> in address order instead of being in DT dma-ranges order. The result is
> which inbound registers are used for each region are swapped. I don't
> know the details about this h/w, but it appears that IB region 0
> registers can't handle a size greater than 4GB. In any case, limiting
> the size for region 0 is enough to get back to the original assignment
> of dma-ranges to regions.
A small nitpick: it would be "X-Gene" in the above as per Applied Micro's
(or rather MACOM Technology Solutions these days, I suppose) product line
naming.
> @@ -465,7 +465,7 @@ static int xgene_pcie_select_ib_reg(u8 *ib_reg_mask, u64 size)
> return 1;
> }
>
> - if ((size > SZ_1K) && (size < SZ_1T) && !(*ib_reg_mask & (1 << 0))) {
> + if ((size > SZ_1K) && (size < SZ_4G) && !(*ib_reg_mask & (1 << 0))) {
> *ib_reg_mask |= (1 << 0);
> return 0;
> }
Thank you!
Reviewed-by: Krzysztof Wilczyński <kw@...ux.com>
Also, thank you Stéphane for testing! Much appreciated!
Krzysztof
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