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Message-ID: <YaXrkJbsktXFAgFJ@smile.fi.intel.com>
Date: Tue, 30 Nov 2021 11:14:56 +0200
From: Andy Shevchenko <andriy.shevchenko@...el.com>
To: Wolfram Sang <wsa@...nel.org>, lakshmi.sowjanya.d@...el.com,
linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
jarkko.nikula@...ux.intel.com, bala.senthil@...el.com,
pandith.n@...el.com
Subject: Re: [PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters
for Elkhart Lake PSE
On Mon, Nov 29, 2021 at 05:57:03PM +0100, Wolfram Sang wrote:
> On Tue, Nov 09, 2021 at 04:05:52PM +0530, lakshmi.sowjanya.d@...el.com wrote:
> > From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@...el.com>
> >
> > Set optimal HCNT, LCNT and hold time values for all the speeds supported
> > in Intel Programmable Service Engine I2C controller in Intel Elkhart
> > Lake.
> >
> > Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@...el.com>
>
> Applied to for-next, thanks!
Oh là là! Can we revert these, please?
After the commit 64d0a0755c7d ("i2c: designware: Read counters from ACPI for
PCI driver") the PCI driver should get this from ACPI tables, no hard coding
needed anymore. I did that series to address this very issue.
So, Lakshmi, please ask for BIOS fix as we discussed long time ago.
--
With Best Regards,
Andy Shevchenko
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