lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 30 Nov 2021 10:52:17 +0100
From:   Philipp Zabel <p.zabel@...gutronix.de>
To:     Billy Tsai <billy_tsai@...eedtech.com>, jdelvare@...e.com,
        linux@...ck-us.net, robh+dt@...nel.org, joel@....id.au,
        andrew@...id.au, lee.jones@...aro.org, thierry.reding@...il.com,
        u.kleine-koenig@...gutronix.de, linux-hwmon@...r.kernel.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
        linux-pwm@...r.kernel.org
Cc:     BMC-SW@...eedtech.com
Subject: Re: [v13 2/2] pwm: Add Aspeed ast2600 PWM support

On Mon, 2021-11-29 at 14:43 +0800, Billy Tsai wrote:
[...]
> +	ret = clk_prepare_enable(priv->clk);
> +	if (ret)
> +		return dev_err_probe(dev, ret, "Couldn't enable clock\n");
> +
> +	ret = reset_control_deassert(priv->reset);
> +	if (ret) {
> +		dev_err_probe(dev, ret, "Couldn't deassert reset control\n");
> +		goto err_disable_clk;
> +	}

Is there any reason to keep the clocks running and the controller out of
reset while the PWM outputs are disabled?

regards
Philipp

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ