linux-kernel - Re: [PATCH V4 1/2] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt

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Message-ID: <2728314.U2HhIfhhqV@diego>
Date:   Tue, 30 Nov 2021 14:27:48 +0100
From:   Heiko Stübner <heiko@...ech.de>
To:     linux-riscv@...ts.infradead.org, Jessica Clarke <jrtc27@...c27.com>
Cc:     Wei Fu <wefu@...hat.com>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
        taiten.peng@...onical.com, aniket.ponkshe@...onical.com,
        gordan.markus@...onical.com, Guo Ren <guoren@...ux.alibaba.com>,
        arnd@...db.de, wens@...e.org, maxime@...no.tech,
        Dan Lustig <dlustig@...dia.com>,
        Greg Favor <gfavor@...tanamicro.com>,
        andrea.mondelli@...wei.com, behrensj@....edu, xinhaoqu@...wei.com,
        huffman@...ence.com, Nick Kossifidis <mick@....forth.gr>,
        Allen Baum <allen.baum@...erantotech.com>,
        jscheid@...tanamicro.com, rtrauben@...il.com,
        Anup Patel <anup@...infault.org>,
        Rob Herring <robh+dt@...nel.org>,
        Anup Patel <anup.patel@....com>, atishp04@...il.com,
        Palmer Dabbelt <palmer@...belt.com>,
        Guo Ren <guoren@...nel.org>,
        Christoph Müllner 
        <christoph.muellner@...ll.eu>,
        Philipp Tomsich <philipp.tomsich@...ll.eu>, hch@....de,
        liush@...winnertech.com, Wei Wu <lazyparser@...il.com>,
        drew@...gleboard.org,
        Heinrich Schuchardt <heinrich.schuchardt@...onical.com>
Subject: Re: [PATCH V4 1/2] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt

Hi,

Am Dienstag, 30. November 2021, 14:17:41 CET schrieb Jessica Clarke:
> On 30 Nov 2021, at 12:07, Heiko Stübner <heiko@...ech.de> wrote:
> > 
> > Am Montag, 29. November 2021, 13:06:23 CET schrieb Heiko Stübner:
> >> Am Montag, 29. November 2021, 09:54:39 CET schrieb Heinrich Schuchardt:
> >>> On 11/29/21 02:40, wefu@...hat.com wrote:
> >>>> From: Wei Fu <wefu@...hat.com>
> >>>> 
> >>>> Previous patch has added svpbmt in arch/riscv and add "riscv,svpmbt"
> >>>> in the DT mmu node. Update dt-bindings related property here.
> >>>> 
> >>>> Signed-off-by: Wei Fu <wefu@...hat.com>
> >>>> Co-developed-by: Guo Ren <guoren@...nel.org>
> >>>> Signed-off-by: Guo Ren <guoren@...nel.org>
> >>>> Cc: Anup Patel <anup@...infault.org>
> >>>> Cc: Palmer Dabbelt <palmer@...belt.com>
> >>>> Cc: Rob Herring <robh+dt@...nel.org>
> >>>> ---
> >>>>  Documentation/devicetree/bindings/riscv/cpus.yaml | 10 ++++++++++
> >>>>  1 file changed, 10 insertions(+)
> >>>> 
> >>>> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> >>>> index aa5fb64d57eb..9ff9cbdd8a85 100644
> >>>> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> >>>> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> >>>> @@ -63,6 +63,16 @@ properties:
> >>>>        - riscv,sv48
> >>>>        - riscv,none
> >>>> 
> >>>> +  mmu:
> >>> 
> >>> Shouldn't we keep the items be in alphabetic order, i.e. mmu before 
> >>> mmu-type?
> >>> 
> >>>> +    description:
> >>>> +      Describes the CPU's MMU Standard Extensions support.
> >>>> +      These values originate from the RISC-V Privileged
> >>>> +      Specification document, available from
> >>>> +      https://riscv.org/specifications/
> >>>> +    $ref: '/schemas/types.yaml#/definitions/string'
> >>>> +    enum:
> >>>> +      - riscv,svpmbt
> >>> 
> >>> The privileged specification has multiple MMU related extensions: 
> >>> Svnapot, Svpbmt, Svinval. Shall they all be modeled in this enum?
> >> 
> >> I remember in some earlier version some way back there was the
> >> suggestion of using a sub-node instead and then adding boolean
> >> properties for the supported extensions.
> >> 
> >> Aka something like
> >> 	mmu {
> >> 		riscv,svpbmt;	
> >> 	};
> > 
> > For the record, I'm talking about the mail from september
> > https://lore.kernel.org/linux-riscv/CAAeLtUChjjzG+P8yg45GLZMJy5UR2K5RRBoLFVZhtOaZ5pPtEA@mail.gmail.com/
> > 
> > So having a sub-node would make adding future extensions
> > way nicer.
> 
> Svpbmt is just an ISA extension, and should be treated like any other.
> Let’s not invent two different ways of representing that in the device
> tree.

Heinrich asked how the other extensions should be handled
(Svnapot, Svpbmt, Svinval), so what do you suggest to do with these?


Thanks
Heiko