linux-kernel - [PATCH v2 1/3] dt-bindings: ls2k1000: add gpu device node

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Date:   Wed,  1 Dec 2021 19:35:00 +0800
From:   Sui Jingfeng <15330273260@....cn>
To:     Lucas Stach <l.stach@...gutronix.de>,
        Russell King <linux+etnaviv@...linux.org.uk>,
        Christian Gmeiner <christian.gmeiner@...il.com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Rob Herring <robh+dt@...nel.org>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Andrey Zhizhikin <andrey.zhizhikin@...ca-geosystems.com>,
        Sam Ravnborg <sam@...nborg.org>,
        Tiezhu Yang <yangtiezhu@...ngson.cn>,
        Qing Zhang <zhangqing@...ngson.cn>,
        Jinyang He <hejinyang@...ngson.cn>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        Xiaochuan Mao <maoxiaochuan@...ngson.cn>,
        zhaoxiao <zhaoxiao@...ontech.com>,
        suijingfeng <suijingfeng@...ngson.cn>
Cc:     linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
        etnaviv@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org,
        devicetree@...r.kernel.org
Subject: [PATCH v2 1/3] dt-bindings: ls2k1000: add gpu device node

From: suijingfeng <suijingfeng@...ngson.cn>

There is a vivante gpu (GC1000 V5037) in ls2k1000,
but it is pci device not platform device.

ls2k1000 is dual-core mips64 cpu made by loongson.

Signed-off-by: suijingfeng <suijingfeng@...ngson.cn>
Signed-off-by: Sui Jingfeng <15330273260@....cn>
---
 arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
index bfc3d3243ee7..f1feffac78a6 100644
--- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
@@ -193,6 +193,17 @@
 				interrupt-parent = <&liointc0>;
 			};
 
+			gpu@5,0 {
+				compatible = "pci0014,7a05.0",
+						   "pci0014,7a05",
+						   "pciclass030200",
+						   "pciclass0302";
+
+				reg = <0x2800 0x0 0x0 0x0 0x0>;
+				interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
+				interrupt-parent = <&liointc0>;
+			};
+
 			pci_bridge@9,0 {
 				compatible = "pci0014,7a19.0",
 						   "pci0014,7a19",
-- 
2.20.1