linux-kernel - Re: [PATCH v5 12/13] gpio: Add support for Airoha EN7523 GPIO controller

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Date:   Thu, 2 Dec 2021 18:59:03 +0100
From:   Felix Fietkau <nbd@....name>
To:     Linus Walleij <linus.walleij@...aro.org>
Cc:     linux-arm-kernel@...ts.infradead.org,
        Bartosz Golaszewski <brgl@...ev.pl>, john@...ozen.org,
        linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org
Subject: Re: [PATCH v5 12/13] gpio: Add support for Airoha EN7523 GPIO
 controller


On 2021-12-02 02:47, Linus Walleij wrote:
> Hi Felix!
> 
> Thanks for your patch!
> 
> On Mon, Nov 29, 2021 at 4:54 PM Felix Fietkau <nbd@....name> wrote:
> 
>> From: John Crispin <john@...ozen.org>
>>
>> Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32
>> GPIOs. Each instance in DT is for an single bank.
>>
>> Signed-off-by: John Crispin <john@...ozen.org>
>> Signed-off-by: Felix Fietkau <nbd@....name>
> 
> (...)
>> +config GPIO_EN7523
>> +       tristate "Airoha GPIO support"
>> +       depends on ARCH_AIROHA
>> +       default ARCH_AIROHA
>> +       select GPIO_GENERIC
> 
> Yes that looks applicable, but why isn't it used?
> 
> The few 32-bit registers look like an ideal candidate for
> using the generic GPIO. Check similar drivers such as
> drivers/gpio/gpio-ftgpio010.c and how it uses
> bgpio_init() and the nice doc for bgpio_init() in
> drivers/gpio/gpio-mmio.c.
I just looked at the datasheet and the driver code again, and I think 
EN7523 is too strange for proper generic GPIO support.

For each bank there are two control registers (not consecutive), which 
have 2-bit fields for every GPIO line to control direction. No idea why 
2 bits per line, because only values 0 and 1 are valid, the rest are 
reserved.
For lines configured as output, an extra output-enable bit also needs to 
be set in a separate register before output values can be written.

The code does use bgpio to read/write values, but that's about it.
I don't think it would do the generic GPIO code any good to support this 
weirdness.

- Felix