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Message-Id: <1638432158-4119-7-git-send-email-hongxing.zhu@nxp.com>
Date: Thu, 2 Dec 2021 16:02:36 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: l.stach@...gutronix.de, bhelgaas@...gle.com,
lorenzo.pieralisi@....com, marcel.ziswiler@...adex.com,
tharvey@...eworks.com, kishon@...com, vkoul@...nel.org,
robh@...nel.org, galak@...nel.crashing.org, shawnguo@...nel.org
Cc: hongxing.zhu@....com, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kernel@...gutronix.de, linux-imx@....com
Subject: [PATCH v7 6/8] arm64: dts: imx8mm: Add the pcie support
Add the PCIe support on i.MX8MM platforms.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
Reviewed-by: Tim Harvey <tharvey@...eworks.com>
Tested-by: Tim Harvey <tharvey@...eworks.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 33 ++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 0844f3144887..75f4317215ac 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -520,7 +520,7 @@ iomuxc: pinctrl@...30000 {
};
gpr: iomuxc-gpr@...40000 {
- compatible = "fsl,imx8mm-iomuxc-gpr", "syscon";
+ compatible = "fsl,imx8mm-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x30340000 0x10000>;
};
@@ -1179,6 +1179,37 @@ gpmi: nand-controller@...02000{
status = "disabled";
};
+ pcie0: pcie@...00000 {
+ compatible = "fsl,imx8mm-pcie";
+ reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
+ reg-names = "dbi", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ bus-range = <0x00 0xff>;
+ ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */
+ 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+ num-lanes = <1>;
+ num-viewport = <4>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 3 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,max-link-speed = <2>;
+ linux,pci-domain = <0>;
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+ reset-names = "apps", "turnoff";
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
+ status = "disabled";
+ };
+
gpu_3d: gpu@...00000 {
compatible = "vivante,gc";
reg = <0x38000000 0x8000>;
--
2.25.1
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