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Message-ID: <YajA/Ux5ydtP5Bi3@suse.de>
Date: Thu, 2 Dec 2021 13:50:05 +0100
From: Joerg Roedel <jroedel@...e.de>
To: Borislav Petkov <bp@...en8.de>
Cc: Joerg Roedel <joro@...tes.org>, x86@...nel.org,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, hpa@...or.com,
Dave Hansen <dave.hansen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Mike Rapoport <rppt@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Brijesh Singh <brijesh.singh@....com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/4] x86/mm/64: Flush global TLB on boot and AP bringup
On Tue, Oct 26, 2021 at 02:58:44PM +0200, Borislav Petkov wrote:
> On Tue, Oct 26, 2021 at 11:55:44AM +0200, Borislav Petkov wrote:
> > > + movq %cr4, %rcx
> > > + movq %rcx, %rax
> > > + xorq $X86_CR4_PGE, %rcx
> > > + movq %rcx, %cr4
> > > + movq %rax, %cr4
>
> Also, I'm wondering if you could compact this even more by defining a
> function toggling the PGE bit and calling it from everywhere, even from
> asm.
Yeah, that would make sense, but is probably worth its own patch-set.
Unifying this across arch/x86/ needs to touch a couple more places and
needs special care so that the function is safe to call from early asm.
Regards,
--
Jörg Rödel
jroedel@...e.de
SUSE Software Solutions Germany GmbH
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