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Message-ID: <6887f803-f929-a483-c15d-759ec345e219@xilinx.com>
Date: Fri, 3 Dec 2021 14:21:37 +0100
From: Michal Simek <michal.simek@...inx.com>
To: Harsha <harsha.harsha@...inx.com>, <herbert@...dor.apana.org.au>,
<davem@...emloft.net>, <linux-crypto@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <michal.simek@...inx.com>,
<linux-arm-kernel@...ts.infradead.org>, <robh+dt@...nel.org>,
<devicetree@...r.kernel.org>
CC: <saratcha@...inx.com>, <harshj@...inx.com>
Subject: Re: [RFC PATCH 4/6] arm64: dts: zynqmp: Add Xilinx SHA3 node
On 11/29/21 20:20, Harsha wrote:
> This patch adds a SHA3 DT node for Xilinx ZynqMP SoC.
>
> Signed-off-by: Harsha <harsha.harsha@...inx.com>
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 74e6644..33b7ef6 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -174,6 +174,10 @@
> compatible = "xlnx,zynqmp-aes";
> };
>
> + xlnx_sha3_384: sha384 {
> + compatible = "xlnx,zynqmp-sha3-384";
> + };
> +
> zynqmp_reset: reset-controller {
> compatible = "xlnx,zynqmp-reset";
> #reset-cells = <1>;
>
I will let Rob to comment this but I think this can be discovered and
there is no need to link it with any device now. That's why maybe the
whole dt binding is not needed at all.
Thanks,
Michal
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