[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20211205231558.779698-2-daniel.lezcano@linaro.org>
Date: Mon, 6 Dec 2021 00:15:54 +0100
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: daniel.lezcano@...aro.org, robh@...nel.org
Cc: arnd@...aro.org, heiko@...ech.de, ulf.hansson@...aro.org,
rjw@...ysocki.net, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
lukasz.luba@....com, Robin Murphy <robin.murphy@....com>,
Rob Herring <robh+dt@...nel.org>,
Johan Jonker <jbx6244@...il.com>,
Helen Koike <helen.koike@...labora.com>,
Brian Norris <briannorris@...omium.org>,
Elaine Zhang <zhangqing@...k-chips.com>,
linux-arm-kernel@...ts.infradead.org (moderated list:ARM/Rockchip SoC
support),
linux-rockchip@...ts.infradead.org (open list:ARM/Rockchip SoC support)
Subject: [PATCH v4 2/5] arm64: dts: rockchip: Add powerzones definition for rock960
Add the powerzones description. This first step introduces the big,
the little as powerzone places.
Cc: Robin Murphy <robin.murphy@....com>
Reviewed-by: Ulf Hansson <ulf.hansson@...aro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
---
V4:
- Added missing powerzone-cells
- Changed powerzone name to comply with the pattern property
V3:
- Remove GPU section as no power is available (yet)
- Remove '#powerzone-cells' conforming to the bindings change
V2:
- Move description in the SoC dtsi specific file
V1: Initial post
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d3cdf6f42a30..901515898b5e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -76,6 +76,7 @@ cpu_l0: cpu@0 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l1: cpu@1 {
@@ -88,6 +89,7 @@ cpu_l1: cpu@1 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l2: cpu@2 {
@@ -100,6 +102,7 @@ cpu_l2: cpu@2 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_l3: cpu@3 {
@@ -112,6 +115,7 @@ cpu_l3: cpu@3 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
};
cpu_b0: cpu@100 {
@@ -124,6 +128,7 @@ cpu_b0: cpu@100 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
thermal-idle {
#cooling-cells = <2>;
@@ -142,6 +147,7 @@ cpu_b1: cpu@101 {
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ powerzone = <&PKG_PZ>;
thermal-idle {
#cooling-cells = <2>;
@@ -791,6 +797,18 @@ spi5: spi@...00000 {
status = "disabled";
};
+ powerzones {
+
+ PKG_PZ: powerzone-pkg {
+ #powerzone-cells = <0>;
+ powerzone = <&SOC_PZ>;
+ };
+
+ SOC_PZ: powerzone-soc {
+ #powerzone-cells = <0>;
+ };
+ };
+
thermal_zones: thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <100>;
--
2.25.1
Powered by blists - more mailing lists