lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Tue, 7 Dec 2021 09:42:21 -0800
From:   Jim Mattson <jmattson@...gle.com>
To:     Like Xu <like.xu.linux@...il.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Like Xu <likexu@...cent.com>
Subject: Re: [PATCH v2 1/6] KVM: x86/pmu: Setup pmc->eventsel for fixed PMCs

On Mon, Dec 6, 2021 at 10:08 PM Like Xu <like.xu.linux@...il.com> wrote:
>
> On 7/12/2021 3:50 am, Jim Mattson wrote:
> > On Mon, Nov 29, 2021 at 11:42 PM Like Xu <like.xu.linux@...il.com> wrote:
> >
> >> From: Like Xu <likexu@...cent.com>
> >>
> >> The current pmc->eventsel for fixed counter is underutilised. The
> >> pmc->eventsel can be setup for all known available fixed counters
> >> since we have mapping between fixed pmc index and
> >> the intel_arch_events array.
> >>
> >> Either gp or fixed counter, it will simplify the later checks for
> >> consistency between eventsel and perf_hw_id.
> >>
> >> Signed-off-by: Like Xu <likexu@...cent.com>
> >> ---
> >>   arch/x86/kvm/vmx/pmu_intel.c | 16 ++++++++++++++++
> >>   1 file changed, 16 insertions(+)
> >>
> >> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> >> index 1b7456b2177b..b7ab5fd03681 100644
> >> --- a/arch/x86/kvm/vmx/pmu_intel.c
> >> +++ b/arch/x86/kvm/vmx/pmu_intel.c
> >> @@ -459,6 +459,21 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu,
> >> struct msr_data *msr_info)
> >>          return 1;
> >>   }
> >>
> >> +static void setup_fixed_pmc_eventsel(struct kvm_pmu *pmu)
> >> +{
> >> +       size_t size = ARRAY_SIZE(fixed_pmc_events);
> >> +       struct kvm_pmc *pmc;
> >> +       u32 event;
> >> +       int i;
> >> +
> >> +       for (i = 0; i < pmu->nr_arch_fixed_counters; i++) {
> >> +               pmc = &pmu->fixed_counters[i];
> >> +               event = fixed_pmc_events[array_index_nospec(i, size)];
> >>
> >
> > How do we know that i < size? For example, Ice Lake supports 4
> > fixed counters, but fixed_pmc_events only has three entries.
>
> With the help of macro MAX_FIXED_COUNTERS,
> the fourth or more fixed counter is currently not supported in KVM.

Thanks for the hint. I see it now.

> If the user space sets a super set of CPUID supported by KVM,
> any pmu emulation failure is to be expected, right ?

Actually, I would expect a misconfigured VM to elicit an error. I
don't see the advantage of mis-emulating an unsupported configuration.
But maybe that's just me.

> Waiting for more comments from you on this patch set.

I'll try to get to them this week. Thanks for following up while I was
on holiday.

> >
> >
> >> +               pmc->eventsel = (intel_arch_events[event].unit_mask << 8) |
> >> +                       intel_arch_events[event].eventsel;
> >> +       }
> >> +}
> >> +
> >>
> >>
> >>
> >

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ