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Message-ID: <Ya+vUCP0GdMxj+dg@zn.tnic>
Date: Tue, 7 Dec 2021 20:00:32 +0100
From: Borislav Petkov <bp@...en8.de>
To: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
Cc: x86@...nel.org, linux-edac@...r.kernel.org,
linux-kernel@...r.kernel.org, Tony Luck <tony.luck@...el.com>,
"H . Peter Anvin" <hpa@...or.com>, yazen.ghannam@....com
Subject: Re: [PATCH v3 3/6] x86/mce/inject: Check for writes ignored in
status registers
On Thu, Nov 04, 2021 at 04:58:43PM -0500, Smita Koralahalli wrote:
> According to Section 2.1.16.3 under HWCR[McStatusWrEn] in "PPR for AMD
> Family 19h, Model 01h, Revision B1 Processors - 55898 Rev 0.35 - Feb 5,
> 2021", the status register may sometimes enforce write ignored behavior
> independent of the value of HWCR[McStatusWrEn] depending on the platform
> settings.
How and when can it enforce that?
Can we detect whether that enforcement is active and if so, fail the
injection directly instead of checking whether the writes have stuck in
the MSRs?
--
Regards/Gruss,
Boris.
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