linux-kernel - Re: [PATCH v3] PCI: vmd: Honor ACPI

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Date:   Tue, 7 Dec 2021 14:15:04 +0100
From:   "Rafael J. Wysocki" <rafael@...nel.org>
To:     Keith Busch <kbusch@...nel.org>
Cc:     Kai-Heng Feng <kai.heng.feng@...onical.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Linux PM <linux-pm@...r.kernel.org>,
        "Rafael J . Wysocki" <rafael@...nel.org>,
        Nirmal Patel <nirmal.patel@...ux.intel.com>,
        Jonathan Derrick <jonathan.derrick@...ux.dev>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Linux PCI <linux-pci@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] PCI: vmd: Honor ACPI _OSC on PCIe features

On Tue, Dec 7, 2021 at 12:12 AM Keith Busch <kbusch@...nel.org> wrote:
>
> On Fri, Dec 03, 2021 at 11:15:41AM +0800, Kai-Heng Feng wrote:
> > When Samsung PCIe Gen4 NVMe is connected to Intel ADL VMD, the
> > combination causes AER message flood and drags the system performance
> > down.
> >
> > The issue doesn't happen when VMD mode is disabled in BIOS, since AER
> > isn't enabled by acpi_pci_root_create() . When VMD mode is enabled, AER
> > is enabled regardless of _OSC:
> > [    0.410076] acpi PNP0A08:00: _OSC: platform does not support [AER]
> > ...
> > [    1.486704] pcieport 10000:e0:06.0: AER: enabled with IRQ 146
> >
> > Since VMD is an aperture to regular PCIe root ports, honor ACPI _OSC to
> > disable PCIe features accordingly to resolve the issue.
>
> At least for some versions of this hardare, I recall ACPI is unaware of
> any devices in the VMD domain; the platform can not see past the VMD
> endpoint, so I throught the driver was supposed to always let the VMD
> domain use OS native support regardless of the parent's ACPI _OSC.

This is orthogonal to whether or not ACPI is aware of the VMD domain
or the devices in it.

If the platform firmware does not allow the OS to control specific
PCIe features at the physical host bridge level, that extends to the
VMD "bus", because it is just a way to expose a hidden part of the
PCIe hierarchy.

The platform firmware does that through ACPI _OSC under the host
bridge device (not under the VMD device) which it is very well aware
of.