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Message-ID: <PH0PR02MB7271C9F92C667D80AB0A5CA8DE6F9@PH0PR02MB7271.namprd02.prod.outlook.com>
Date: Wed, 8 Dec 2021 04:17:15 +0000
From: Harsha Harsha <harshah@...inx.com>
To: Rob Herring <robh@...nel.org>
CC: "herbert@...dor.apana.org.au" <herbert@...dor.apana.org.au>,
"davem@...emloft.net" <davem@...emloft.net>,
"linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Michal Simek <michals@...inx.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Sarat Chand Savitala <saratcha@...inx.com>,
Harsh Jain <harshj@...inx.com>
Subject: RE: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3
driver
Hi Rob,
Thanks for your review.
> -----Original Message-----
> From: Rob Herring <robh@...nel.org>
> Sent: Wednesday, December 8, 2021 3:00 AM
> To: Harsha Harsha <harshah@...inx.com>
> Cc: herbert@...dor.apana.org.au; davem@...emloft.net; linux-crypto@...r.kernel.org; linux-kernel@...r.kernel.org; Michal
> Simek <michals@...inx.com>; linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org; Sarat Chand Savitala
> <saratcha@...inx.com>; Harsh Jain <harshj@...inx.com>
> Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver
>
> On Tue, Nov 30, 2021 at 02:24:22PM +0530, Harsha wrote:
> > This patch adds documentation to describe Xilinx ZynqMP SHA3 driver
> > bindings.
> >
> > Signed-off-by: Harsha <harsha.harsha@...inx.com>
> > ---
> > .../bindings/crypto/xlnx,zynqmp-sha3.yaml | 30 ++++++++++++++++++++++
> > 1 file changed, 30 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > new file mode 100644
> > index 0000000..45a8022
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > @@ -0,0 +1,30 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-sha3.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Xilinx ZynqMP SHA3 Hardware Accelerator Device Tree Bindings
> > +
> > +maintainers:
> > + - Harsha Harsha<harsha.harsha@...inx.com>
>
> space ^
Accepted. Will remove space in next version of patch series.
>
> > +
> > +description: |
>
> Don't need '|' if no formatting to preserve.
Accepted. Will remove | in next version of patch series.
>
> > + The ZynqMP SHA3 hardened cryptographic accelerator is used to
> > + calculate the SHA3 hash for the given user data.
> > +
> > +properties:
> > + compatible:
> > + const: xlnx,zynqmp-sha3-384
> > +
> > +required:
> > + - compatible
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + xlnx_sha3_384: sha3-384 {
>
> crypto {
>
> > + compatible = "xlnx,zynqmp-sha3-384";
>
> You need some way to access this h/w.
Accepted. Will add required details similar to https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git/tree/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml
>
> > + };
> > +...
> > --
> > 1.8.2.1
> >
> >
Regards,
Harsha
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