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Message-ID: <1638959596-6656-3-git-send-email-fabrice.gasnier@foss.st.com>
Date: Wed, 8 Dec 2021 11:33:16 +0100
From: Fabrice Gasnier <fabrice.gasnier@...s.st.com>
To: <alexandre.torgue@...s.st.com>, <robh+dt@...nel.org>
CC: <olivier.moysan@...s.st.com>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<fabrice.gasnier@...s.st.com>
Subject: [PATCH 2/2] ARM: dts: stm32: remove timer5 duplicate unit-address on stm32f4 series
Remove the following warnings seen when building with W=1.
Warning (unique_unit_address): /soc/timer@...00c00: duplicate unit-address
(also used in node /soc/timers@...00c00)
This approach is based on some discussions[1], to restructure the dtsi
and dts files.
Timer5 is enabled by default on stm32f4 series, to act as clockevent. In
order to get rid of the W=1 warning, and be compliant with dt-schemas
(e.g. dtbs_check):
- In stm32f429.dtsi:
. Keep the more complete timers5 description
. Remove the most simple timer5 node that is duplicate
- In each board:
. adopt "st,stm32-timer" compatible for timers5, also add the interrupt
. use /delete-property/ and /delete-node/ so the it matches the
clockevent bindings
Note: all this is done in one shot (e.g. not split) to keep clockevent
functionality.
[1] https://lore.kernel.org/linux-arm-kernel/Yaf4jiZIp8+ndaXs@robh.at.kernel.org/
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@...s.st.com>
---
arch/arm/boot/dts/stm32429i-eval.dts | 12 ++++++++++++
arch/arm/boot/dts/stm32f429-disco.dts | 12 ++++++++++++
arch/arm/boot/dts/stm32f429.dtsi | 7 -------
arch/arm/boot/dts/stm32f469-disco.dts | 12 ++++++++++++
4 files changed, 36 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts
index cb46326..0d98aca 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -308,6 +308,18 @@
};
};
+&timers5 {
+ /* Override timer5 to act as clockevent */
+ compatible = "st,stm32-timer";
+ interrupts = <50>;
+ status = "okay";
+ /delete-property/#address-cells;
+ /delete-property/#size-cells;
+ /delete-property/clock-names;
+ /delete-node/pwm;
+ /delete-node/timer@4;
+};
+
&usart1 {
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts
index 075ac57..06a7091 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -205,6 +205,18 @@
};
};
+&timers5 {
+ /* Override timer5 to act as clockevent */
+ compatible = "st,stm32-timer";
+ interrupts = <50>;
+ status = "okay";
+ /delete-property/#address-cells;
+ /delete-property/#size-cells;
+ /delete-property/clock-names;
+ /delete-node/pwm;
+ /delete-node/timer@4;
+};
+
&usart1 {
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index f21b322..1723346 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -159,13 +159,6 @@
};
};
- timer5: timer@...00c00 {
- compatible = "st,stm32-timer";
- reg = <0x40000c00 0x400>;
- interrupts = <50>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
- };
-
timers5: timers@...00c00 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts
index 30905ce6..cac3a67 100644
--- a/arch/arm/boot/dts/stm32f469-disco.dts
+++ b/arch/arm/boot/dts/stm32f469-disco.dts
@@ -224,6 +224,18 @@
bus-width = <4>;
};
+&timers5 {
+ /* Override timer5 to act as clockevent */
+ compatible = "st,stm32-timer";
+ interrupts = <50>;
+ status = "okay";
+ /delete-property/#address-cells;
+ /delete-property/#size-cells;
+ /delete-property/clock-names;
+ /delete-node/pwm;
+ /delete-node/timer@4;
+};
+
&usart3 {
pinctrl-0 = <&usart3_pins_a>;
pinctrl-names = "default";
--
2.7.4
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