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Message-ID: <87o85r4a4f.fsf@intel.com>
Date: Wed, 08 Dec 2021 13:19:28 +0200
From: Jani Nikula <jani.nikula@...ux.intel.com>
To: Kees Cook <keescook@...omium.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>
Cc: David Airlie <airlied@...ux.ie>, linux-kernel@...r.kernel.org,
linux-hardening@...r.kernel.org, dri-devel@...ts.freedesktop.org,
Thomas Zimmermann <tzimmermann@...e.de>,
Thierry Reding <treding@...dia.com>,
Kees Cook <keescook@...omium.org>
Subject: Re: [PATCH] drm/dp: Actually read Adjust Request Post Cursor2 register
On Fri, 03 Dec 2021, Kees Cook <keescook@...omium.org> wrote:
> The link_status array was not large enough to read the Adjust Request
> Post Cursor2 register. Adjust the size to include it. Found with a
> -Warray-bounds build:
>
> drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_get_adjust_request_post_cursor':
> drivers/gpu/drm/drm_dp_helper.c:59:27: error: array subscript 10 is outside array bounds of 'const u8[6]' {aka 'const unsigned char[6]'} [-Werror=array-bounds]
> 59 | return link_status[r - DP_LANE0_1_STATUS];
> | ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/drm_dp_helper.c:147:51: note: while referencing 'link_status'
> 147 | u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
> | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
> Fixes: 79465e0ffeb9 ("drm/dp: Add helper to get post-cursor adjustments")
> Signed-off-by: Kees Cook <keescook@...omium.org>
Using DP_ADJUST_REQUEST_POST_CURSOR2 has been deprecated since DP 1.3
published in 2014, and Tegra is the only user of
drm_dp_get_adjust_request_post_cursor().
Instead of bumping the link status read size from 6 to 11 for all
drivers I'd much rather see some other (maybe Tegra specific) solution
to this.
BR,
Jani.
> ---
> include/drm/drm_dp_helper.h | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 472dac376284..277643d2fe2c 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -1517,7 +1517,15 @@ enum drm_dp_phy {
> #define DP_MST_LOGICAL_PORT_0 8
>
> #define DP_LINK_CONSTANT_N_VALUE 0x8000
> -#define DP_LINK_STATUS_SIZE 6
> +/*
> + * DPCD registers in link_status:
> + * Link Status: 0x202 through 0x204
> + * Sink Status: 0x205
> + * Adjust Request: 0x206 through 0x207
> + * Training Score: 0x208 through 0x20b
> + * AR Post Cursor2: 0x20c
> + */
> +#define DP_LINK_STATUS_SIZE 11
> bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
> int lane_count);
> bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
--
Jani Nikula, Intel Open Source Graphics Center
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