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Message-ID: <b21686fc-3662-1ed4-8ba3-8ed5ca6eda13@linaro.org>
Date: Wed, 8 Dec 2021 07:30:28 -0600
From: Alex Elder <elder@...aro.org>
To: Marijn Suijten <marijn.suijten@...ainline.org>,
phone-devel@...r.kernel.org, Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: ~postmarketos/upstreaming@...ts.sr.ht,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Martin Botka <martin.botka@...ainline.org>,
Jami Kettunen <jami.kettunen@...ainline.org>,
Pavel Dubrova <pashadubrova@...il.com>,
Kalle Valo <kvalo@...eaurora.org>,
Arnd Bergmann <arnd@...db.de>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thara Gopinath <thara.gopinath@...aro.org>,
Elliot Berman <eberman@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] firmware: qcom: scm: Add function to set the maximum
IOMMU pool size
On 12/8/21 2:34 AM, Marijn Suijten wrote:
> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
>
> This is not necessary for basic functionality of the IOMMU, but
> it's an optimization that tells to the TZ what's the maximum
> mappable size for the secure IOMMUs, so that it can optimize
> the data structures in the TZ itself.
Are there no users of this function? -Alex
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
> [Marijn: ported from 5.3 to the unified architecture in 5.11]
> Signed-off-by: Marijn Suijten <marijn.suijten@...ainline.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
> ---
> drivers/firmware/qcom_scm.c | 15 +++++++++++++++
> drivers/firmware/qcom_scm.h | 1 +
> include/linux/qcom_scm.h | 1 +
> 3 files changed, 17 insertions(+)
>
> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
> index 3f67bf774821..d5a9ba15e2ba 100644
> --- a/drivers/firmware/qcom_scm.c
> +++ b/drivers/firmware/qcom_scm.c
> @@ -759,6 +759,21 @@ int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare)
> }
> EXPORT_SYMBOL(qcom_scm_iommu_secure_ptbl_init);
>
> +int qcom_scm_iommu_set_cp_pool_size(u32 spare, u32 size)
> +{
> + struct qcom_scm_desc desc = {
> + .svc = QCOM_SCM_SVC_MP,
> + .cmd = QCOM_SCM_MP_IOMMU_SET_CP_POOL_SIZE,
> + .arginfo = QCOM_SCM_ARGS(2),
> + .args[0] = size,
> + .args[1] = spare,
> + .owner = ARM_SMCCC_OWNER_SIP,
> + };
> +
> + return qcom_scm_call(__scm->dev, &desc, NULL);
> +}
> +EXPORT_SYMBOL(qcom_scm_iommu_set_cp_pool_size);
> +
> int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size,
> u32 cp_nonpixel_start,
> u32 cp_nonpixel_size)
> diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
> index d92156ceb3ac..bb627941702b 100644
> --- a/drivers/firmware/qcom_scm.h
> +++ b/drivers/firmware/qcom_scm.h
> @@ -100,6 +100,7 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
> #define QCOM_SCM_MP_RESTORE_SEC_CFG 0x02
> #define QCOM_SCM_MP_IOMMU_SECURE_PTBL_SIZE 0x03
> #define QCOM_SCM_MP_IOMMU_SECURE_PTBL_INIT 0x04
> +#define QCOM_SCM_MP_IOMMU_SET_CP_POOL_SIZE 0x05
> #define QCOM_SCM_MP_VIDEO_VAR 0x08
> #define QCOM_SCM_MP_ASSIGN 0x16
>
> diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
> index 81cad9e1e412..8a065f8660c1 100644
> --- a/include/linux/qcom_scm.h
> +++ b/include/linux/qcom_scm.h
> @@ -83,6 +83,7 @@ extern bool qcom_scm_restore_sec_cfg_available(void);
> extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
> extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
> extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
> +extern int qcom_scm_iommu_set_cp_pool_size(u32 spare, u32 size);
> extern int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size,
> u32 cp_nonpixel_start,
> u32 cp_nonpixel_size);
>
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