linux-kernel - Re: [PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver

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Message-ID: <87a6hb13w7.wl-maz@kernel.org>
Date:   Wed, 08 Dec 2021 16:02:16 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     "qinjian[覃健]" <qinjian@...lus1.com>
Cc:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "broonie@...nel.org" <broonie@...nel.org>,
        "arnd@...db.de" <arnd@...db.de>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        Wells Lu 呂芳騰 <wells.lu@...plus.com>
Subject: Re: [PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver

On Wed, 08 Dec 2021 09:28:42 +0000,
"qinjian[覃健]" <qinjian@...lus1.com> wrote:
> 
> > -----Original Message-----
> > From: Marc Zyngier <maz@...nel.org>
> > Sent: Wednesday, December 8, 2021 3:45 PM
> > To: qinjian[覃健] <qinjian@...lus1.com>
> > Cc: robh+dt@...nel.org; mturquette@...libre.com; sboyd@...nel.org; tglx@...utronix.de; p.zabel@...gutronix.de;
> > linux@...linux.org.uk; broonie@...nel.org; arnd@...db.de; linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org; linux-
> > kernel@...r.kernel.org; linux-clk@...r.kernel.org; Wells Lu 呂芳騰 <wells.lu@...plus.com>
> > Subject: Re: [PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver
> > 
> > On 2021-12-08 07:15, qinjian[覃健] wrote:
> > >> > +void sp_intc_set_ext(u32 hwirq, int ext_num)
> > >> > +{
> > >> > +	sp_intc_assign_bit(hwirq, REG_INTR_PRIORITY, !ext_num);
> > >> > +}
> > >> > +EXPORT_SYMBOL_GPL(sp_intc_set_ext);
> > >>
> > >> No way. We don't export random symbols without a good justification,
> > >> and you didn't give any.
> > >>
> > >
> > > This function called by SP7021 display driver to decide DISPLAY_IRQ
> > > routing to which parent irq (EXT_INT0 or EXT_INT1).
> > 
> > Based on what? How can a display driver decide which parent is
> > appropriate? What improvement does this bring?
> 
> In default, all IRQ routing to EXT_INT0, which processed by CPU0
> Some device's IRQ need low latency, like display, so routing
> DISPLAY_IRQ to EXT_INT1, which processed by CPU1 (set
> /proc/irq/<EXT_INT1>/smp_affinity_list)

Why would that have a lower latency? What if CPU1 is busy with
interrupts disabled most of the time? How does the display driver
finds out what is better?

And if you really wanted a lower latency, why route the interrupt via
a secondary interrupt controller, instead of attaching it directly to
the upstream GIC?

I really don't think this is an acceptable thing to do. Configure the
interrupt route statically if you want, but we're not exposing this
sort of SoC-specific API to other drivers.

	M.

-- 
Without deviation from the norm, progress is not possible.