linux-kernel - [Patch v1 6/8] arm64: tegra: Add node for CBB2.0 in Tegra234 SOC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <20211209170715.17392-1-sumitg@nvidia.com>
Date:   Thu, 9 Dec 2021 22:37:15 +0530
From:   Sumit Gupta <sumitg@...dia.com>
To:     <linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <thierry.reding@...il.com>,
        <jonathanh@...dia.com>, <robh+dt@...nel.org>
CC:     <sumitg@...dia.com>, <bbasu@...dia.com>, <vsethi@...dia.com>,
        <jsequeira@...dia.com>
Subject: [Patch v1 6/8] arm64: tegra: Add node for CBB2.0 in Tegra234 SOC

Control Backbone(CBB) version 2.0 is used in Tegra234 SOC.
Adding nodes to enable handling of errors from different
CBB 2.0 based fabrics in Tegra234 SOC.

Signed-off-by: Sumit Gupta <sumitg@...dia.com>
---
 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 49 ++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index f0efb3a62804..4cef45df0a3e 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -73,6 +73,22 @@
 			#mbox-cells = <2>;
 		};
 
+		sce-fabric@...0000 {
+			compatible = "nvidia,tegra234-sce-fabric";
+			reg = <0xb600000 0x40000>;
+			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,err-notifier-base = <0 0x19000>;
+			status = "okay";
+		};
+
+		rce-fabric@...0000 {
+			compatible = "nvidia,tegra234-rce-fabric";
+			reg = <0xbe00000 0x40000>;
+			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,err-notifier-base = <0 0x19000>;
+			status = "okay";
+		};
+
 		hsp_aon: hsp@...0000 {
 			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
 			reg = <0x0c150000 0x90000>;
@@ -109,6 +125,30 @@
 			interrupt-controller;
 		};
 
+		aon-fabric@...0000 {
+			compatible = "nvidia,tegra234-aon-fabric";
+			reg = <0xc600000 0x40000>;
+			interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,err-notifier-base = <0 0x17000>;
+			status = "okay";
+		};
+
+		bpmp-fabric@...0000 {
+			compatible = "nvidia,tegra234-bpmp-fabric";
+			reg = <0xd600000 0x40000>;
+			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,err-notifier-base = <0 0x19000>;
+			status = "okay";
+		};
+
+		dce-fabric@...0000 {
+			compatible = "nvidia,tegra234-sce-fabric";
+			reg = <0xde00000 0x40000>;
+			interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,err-notifier-base = <0 0x19000>;
+			status = "okay";
+		};
+
 		gic: interrupt-controller@...0000 {
 			compatible = "arm,gic-v3";
 			reg = <0x0f400000 0x010000>, /* GICD */
@@ -120,6 +160,15 @@
 			#interrupt-cells = <3>;
 			interrupt-controller;
 		};
+
+		cbb-fabric@...3a00000 {
+			compatible = "nvidia,tegra234-cbb-fabric";
+			reg = <0x13a00000 0x400000>;
+			interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,err-notifier-base = <0 0x60000>;
+			nvidia,off-mask-erd = <0 0x3a004>;
+			status = "okay";
+		};
 	};
 
 	sysram@...00000 {
-- 
2.17.1