lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YbJJCf20VdHNnpzY@google.com>
Date:   Thu, 9 Dec 2021 18:20:57 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     Aili Yao <yaoaili126@...il.com>
Cc:     pbonzini@...hat.com, vkuznets@...hat.com, wanpengli@...cent.com,
        jmattson@...gle.com, joro@...tes.org, tglx@...utronix.de,
        mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com,
        x86@...nel.org, hpa@...or.com, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, yaoaili@...gsoft.com
Subject: Re: [PATCH v2] KVM: LAPIC: Per vCPU control over
 kvm_can_post_timer_interrupt

On Wed, Dec 08, 2021, Aili Yao wrote:
> On Tue, 7 Dec 2021 23:23:03 +0000
> Sean Christopherson <seanjc@...gle.com> wrote:
> 
> > 
> >  static bool kvm_can_post_timer_interrupt(struct kvm_vcpu *vcpu)
> >  {
> > -       return pi_inject_timer && kvm_vcpu_apicv_active(vcpu);
> > +       return pi_inject_timer && kvm_vcpu_apicv_active(vcpu) &&
> > +              (kvm_mwait_in_guest(vcpu) || kvm_hlt_in_guest(vcpu));
> >  }
> > 
> >  bool kvm_can_use_hv_timer(struct kvm_vcpu *vcpu)
> >  {
> > -       return kvm_x86_ops.set_hv_timer
> > -              && !(kvm_mwait_in_guest(vcpu->kvm) ||
> > -                   kvm_can_post_timer_interrupt(vcpu));
> > +       /*
> > +        * Don't use the hypervisor timer, a.k.a. VMX Preemption Timer, if the
> > +        * guest can execute MWAIT without exiting as the timer will stop
> > +        * counting if the core enters C3 or lower.  HLT in the guest is ok as
> > +        * HLT is effectively C1 and the timer counts in C0, C1, and C2.
> > +        *
> > +        * Don't use the hypervisor timer if KVM can post a timer interrupt to
> > +        * the guest since posted the timer avoids taking an extra a VM-Exit
> > +        * when the timer expires.
> > +        */
> > +       return kvm_x86_ops.set_hv_timer &&
> > +              !kvm_mwait_in_guest(vcpu->kvm) &&
> > +              !kvm_can_post_timer_interrupt(vcpu));
> >  }
> >  EXPORT_SYMBOL_GPL(kvm_can_use_hv_timer);
> > 
> 
> Sorry, I am little confused here now:
> if kvm_can_post_timer_interrupt(vcpu) return true(cpu-pm enabled), then the kvm_can_use_hv_timer will always be false;
> if kvm_can_post_timer_interrupt(vcpu) return false(cpu-pm disable),then kvm_mwait_in_guest(vcpu->kvm) can't be true ether;
> It seems we don't need kvm_mwait_in_guest(vcpu->kvm) here?

We do, it's to prevent the guest from enter C3+ and stopping the VMX preemption
timer, e.g. if either kvm_vcpu_apicv_active() or pi_inject_timer evaluates false.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ