lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d3cb39fce38bc298@bloch.sibelius.xs4all.nl>
Date:   Thu, 9 Dec 2021 15:25:16 +0100 (CET)
From:   Mark Kettenis <mark.kettenis@...all.nl>
To:     Hector Martin <marcan@...can.st>
Cc:     sven@...npeter.dev, robh+dt@...nel.org, marcan@...can.st,
        alyssa@...enzweig.io, kettenis@...nbsd.org, maz@...nel.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/4] dt-bindings: pci: apple,pcie: Add t6000 support

> From: Hector Martin <marcan@...can.st>
> Date: Thu,  9 Dec 2021 14:10:00 +0900
> 
> This new SoC is compatible with the existing driver, but the block
> supports 4 downstream ports, so we need to adjust the binding to
> allow that.
> 
> Signed-off-by: Hector Martin <marcan@...can.st>
> ---
>  .../devicetree/bindings/pci/apple,pcie.yaml   | 28 ++++++++++++++-----
>  1 file changed, 21 insertions(+), 7 deletions(-)

Not 100% certain if we really want to constrain things on a per-SoC
basis this way.  But it matches my understanding of the hardware.

Reviewed-by: Mark Kettenis <kettenis@...nbsd.org>

> diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
> index ef1d424ec299..7f01e15fc81c 100644
> --- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
> @@ -28,19 +28,17 @@ description: |
>    distributed over the root ports as the OS sees fit by programming
>    the PCIe controller's port registers.
>  
> -allOf:
> -  - $ref: /schemas/pci/pci-bus.yaml#
> -  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
> -
>  properties:
>    compatible:
>      items:
> -      - const: apple,t8103-pcie
> +      - enum:
> +          - apple,t8103-pcie
> +          - apple,t6000-pcie
>        - const: apple,pcie
>  
>    reg:
>      minItems: 3
> -    maxItems: 5
> +    maxItems: 6
>  
>    reg-names:
>      minItems: 3
> @@ -50,6 +48,7 @@ properties:
>        - const: port0
>        - const: port1
>        - const: port2
> +      - const: port3
>  
>    ranges:
>      minItems: 2
> @@ -59,7 +58,7 @@ properties:
>      description:
>        Interrupt specifiers, one for each root port.
>      minItems: 1
> -    maxItems: 3
> +    maxItems: 4
>  
>    msi-parent: true
>  
> @@ -81,6 +80,21 @@ required:
>  
>  unevaluatedProperties: false
>  
> +allOf:
> +  - $ref: /schemas/pci/pci-bus.yaml#
> +  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: apple,t8103-pcie
> +    then:
> +      properties:
> +        reg:
> +          maxItems: 5
> +        interrupts:
> +          maxItems: 3
> +
>  examples:
>    - |
>      #include <dt-bindings/interrupt-controller/apple-aic.h>
> -- 
> 2.33.0

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ