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Message-ID: <ae22743b-f861-e48a-5e0b-db692d557cca@linux.ibm.com>
Date: Thu, 9 Dec 2021 16:25:22 +0100
From: Christian Borntraeger <borntraeger@...ux.ibm.com>
To: Matthew Rosato <mjrosato@...ux.ibm.com>, linux-s390@...r.kernel.org
Cc: alex.williamson@...hat.com, cohuck@...hat.com,
schnelle@...ux.ibm.com, farman@...ux.ibm.com, pmorel@...ux.ibm.com,
hca@...ux.ibm.com, gor@...ux.ibm.com,
gerald.schaefer@...ux.ibm.com, agordeev@...ux.ibm.com,
frankja@...ux.ibm.com, david@...hat.com, imbrenda@...ux.ibm.com,
vneethv@...ux.ibm.com, oberpar@...ux.ibm.com, freude@...ux.ibm.com,
thuth@...hat.com, pasic@...ux.ibm.com, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 10/32] s390/pci: stash dtsm and maxstbl
Am 07.12.21 um 21:57 schrieb Matthew Rosato:
> Store information about what IOAT designation types are supported by
> underlying hardware as well as the largest store block size allowed.
> These values will be needed by passthrough.
>
> Signed-off-by: Matthew Rosato <mjrosato@...ux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@...ibm.com>
> ---
> arch/s390/include/asm/pci.h | 2 ++
> arch/s390/include/asm/pci_clp.h | 6 ++++--
> arch/s390/pci/pci_clp.c | 2 ++
> 3 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
> index 2474b8d30f2a..1a8f9f42da3a 100644
> --- a/arch/s390/include/asm/pci.h
> +++ b/arch/s390/include/asm/pci.h
> @@ -126,9 +126,11 @@ struct zpci_dev {
> u32 gd; /* GISA designation for passthrough */
> u16 vfn; /* virtual function number */
> u16 pchid; /* physical channel ID */
> + u16 maxstbl; /* Maximum store block size */
> u8 pfgid; /* function group ID */
> u8 pft; /* pci function type */
> u8 port;
> + u8 dtsm; /* Supported DT mask */
> u8 rid_available : 1;
> u8 has_hp_slot : 1;
> u8 has_resources : 1;
> diff --git a/arch/s390/include/asm/pci_clp.h b/arch/s390/include/asm/pci_clp.h
> index 3af8d196da74..124fadfb74b9 100644
> --- a/arch/s390/include/asm/pci_clp.h
> +++ b/arch/s390/include/asm/pci_clp.h
> @@ -153,9 +153,11 @@ struct clp_rsp_query_pci_grp {
> u8 : 6;
> u8 frame : 1;
> u8 refresh : 1; /* TLB refresh mode */
> - u16 reserved2;
> + u16 : 3;
> + u16 maxstbl : 13; /* Maximum store block size */
> u16 mui;
> - u16 : 16;
> + u8 dtsm; /* Supported DT mask */
> + u8 reserved3;
> u16 maxfaal;
> u16 : 4;
> u16 dnoi : 12;
> diff --git a/arch/s390/pci/pci_clp.c b/arch/s390/pci/pci_clp.c
> index e9ed0e4a5cf0..bc7446566cbc 100644
> --- a/arch/s390/pci/pci_clp.c
> +++ b/arch/s390/pci/pci_clp.c
> @@ -103,6 +103,8 @@ static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
> zdev->max_msi = response->noi;
> zdev->fmb_update = response->mui;
> zdev->version = response->version;
> + zdev->maxstbl = response->maxstbl;
> + zdev->dtsm = response->dtsm;
>
> switch (response->version) {
> case 1:
>
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