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Message-ID: <CABPqkBTCu+PjeXU=Jw4Xsh=x63s-DBVtzJdZmB_pOaoZdabphQ@mail.gmail.com>
Date:   Fri, 10 Dec 2021 13:25:34 -0800
From:   Stephane Eranian <eranian@...gle.com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     linux-kernel@...r.kernel.org, peterz@...radead.org,
        kim.phillips@....com, acme@...hat.com, jolsa@...hat.com,
        songliubraving@...com, mpe@...erman.id.au, maddy@...ux.ibm.com
Subject: Re: [PATCH v4 02/14] x86/cpufeatures: add AMD Fam19h Branch Sampling feature

On Fri, Dec 10, 2021 at 1:21 PM Borislav Petkov <bp@...en8.de> wrote:
>
> On Fri, Dec 10, 2021 at 01:02:17PM -0800, Stephane Eranian wrote:
> > This patch adds a cpu feature for AMD Fam19h Branch Sampling feature as bit
> > 31 of EBX on CPUID leaf function 0x80000008.
> >
> > Signed-off-by: Stephane Eranian <eranian@...gle.com>
> > ---
> >  arch/x86/include/asm/cpufeatures.h | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> > index d5b5f2ab87a0..e71443f93f04 100644
> > --- a/arch/x86/include/asm/cpufeatures.h
> > +++ b/arch/x86/include/asm/cpufeatures.h
> > @@ -315,6 +315,7 @@
> >  #define X86_FEATURE_AMD_SSBD         (13*32+24) /* "" Speculative Store Bypass Disable */
> >  #define X86_FEATURE_VIRT_SSBD                (13*32+25) /* Virtualized Speculative Store Bypass Disable */
> >  #define X86_FEATURE_AMD_SSB_NO               (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */
> > +#define X86_FEATURE_AMD_BRS          (13*32+31) /* Branch Sampling available */
> >
> >  /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */
> >  #define X86_FEATURE_DTHERM           (14*32+ 0) /* Digital Thermal Sensor */
> > --
>
> It seems you missed my note from the last time:
>
> https://lore.kernel.org/r/YY0OUNqv1w/ihmHX@zn.tnic
>
Yes, I missed that. No worry, I will fix in V5.
Thanks for pointing it out.

>
> --
> Regards/Gruss,
>     Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette

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