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Message-ID: <fe3eaea3-5dc7-f727-7c1b-5149c83a2bc9@redhat.com>
Date:   Fri, 10 Dec 2021 17:30:51 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Yang Zhong <yang.zhong@...el.com>, x86@...nel.org,
        kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
        tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
        dave.hansen@...ux.intel.com
Cc:     seanjc@...gle.com, jun.nakajima@...el.com, kevin.tian@...el.com,
        jing2.liu@...ux.intel.com, jing2.liu@...el.com
Subject: Re: [PATCH 18/19] kvm: x86: AMX XCR0 support for guest

On 12/8/21 01:03, Yang Zhong wrote:
> +
> +#ifdef CONFIG_X86_64
> +	if ((xcr0 & XFEATURE_MASK_XTILE) &&
> +	    ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
> +		return 1;
> +#else
> +	/*
> +	 * Intel AMX instructions can be executed only in 64-bit mode but
> +	 * XSAVE can operate on XTILECFG and XTILEDATA in any mode.
> +	 * Since the FPU core follows SDM recommendation to set
> +	 * XCR[18:17] only in 64-bit environment, here also prevent any
> +	 * guest OS from setting the two bits when host is 32-bit.
> +	 *
> +	 * XFEATURE_MASK_XTILE cannot be used since it is 0 in this case.
> +	 */
> +	xcr0 &= ~(XFEATURE_MASK_XTILE_DATA | XFEATURE_MASK_XTILE_CFG);
> +#endif

This should not be necessary, because on a 32-bit system the bits won't 
be part of supported_xcr0.

Paolo

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